參數(shù)資料
型號(hào)： MC94MX21DVKN3R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 350 MHz, MICROPROCESSOR, PBGA289
封裝： 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, LEAD FREE, PLASTIC, BGA-289
文件頁數(shù)： 24/98頁
文件大?。?/td> 1326K
代理商： MC94MX21DVKN3R2
MC94MX21 Technical Data, Rev. 1.
5
30
Freescale Semiconductor
Specifications
Figure 20. 4/8/12/16/18 Bit/Pixel TFT Color Mode Panel Timing
Table 20. 4/8/12/16/18 Bit/Pixel TFT Color Mode Panel Timing
Symbol
Description
Minimum
Value
Unit
T1
End of OE to beginning of VSYN
T5+T6+T7-1
(VWAIT1T2)+T5+T6+T7-1
Ts
T2
HSYN period
–
XMAX+T5+T6+T7
Ts
T3
VSYN pulse width
T2
VWIDTHT2
Ts
T4
End of VSYN to beginning of OE
1
(VWAIT2T2)+1
Ts
T5
HSYN pulse width
1
HWIDTH+1
Ts
T6
End of HSYN to beginning to OE
3
HWAIT2+3
Ts
T7
End of OE to beginning of HSYN
1
HWAIT1+1
Ts
Note:
Ts is the SCLK period.
VSYN, HSYN and OE can be programmed as active high or active low. In Figure 20, all 3 signals are active low.
SCLK can be programmed to be deactivated during the VSYN pulse or the OE deasserted period. In Figure 20, SCLK is
always active.
XMAX is defined in number of pixels in one line.
Line 1
Line Y
T1
T4
T3
(0,1)
(0,2)
(0,X-1)
T5
T7
T6
XMAX
VSYN
HSYN
OE
LD[17:0]
SCLK
HSYN
OE
LD[15:0]
T2
Display region
Non-display region
Line Y
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MC94MX21DVKN3
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