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ML674001 Series/ML675001 Series User’s Manual
Table of Contents
ii
Chapter 3
Address Mapping
3.1 Overview ........................................................................................................................................................ 3-1
3.1.1
Pin List.................................................................................................................................................... 3-1
3.1.2
Register List............................................................................................................................................ 3-1
3.2 Address Map................................................................................................................................................... 3-2
3.2.1
ML674001 series address map................................................................................................................ 3-2
3.2.2
ML675001 series address map................................................................................................................ 3-3
3.3 Register Descriptions...................................................................................................................................... 3-4
3.3.1
Remap Control Register (RMPCON) ..................................................................................................... 3-4
3.3.2
ROM Select Register (ROMSEL)........................................................................................................... 3-5
3.4 Remap Description ......................................................................................................................................... 3-6
3.4.1
Remap Setting......................................................................................................................................... 3-6
3.4.2
Boot Control ........................................................................................................................................... 3-7
3.4.3
Notes of Address map............................................................................................................................. 3-7
3.4.4
Remap Setting Example.......................................................................................................................... 3-8
Chapter 4
Chip Configuration
4.1 Overview ........................................................................................................................................................ 4-1
4.1.1
Pin List.................................................................................................................................................... 4-1
4.2 Pin Description ............................................................................................................................................... 4-1
Chapter 5
Clock Generator
5.1 Overview ........................................................................................................................................................ 5-1
5.1.1
Components ............................................................................................................................................ 5-1
5.1.2
Pin List.................................................................................................................................................... 5-2
5.1.3
PLL Clock frequency setup (ML675001 Series Only. *) ....................................................................... 5-2
5.2 Sample Crystal Connections........................................................................................................................... 5-2
Chapter 6
Reset Control
6.1 Overview ........................................................................................................................................................ 6-1
6.1.1
Pin List.................................................................................................................................................... 6-1
6.2 Reset Types..................................................................................................................................................... 6-1
6.2.1
External Reset Input................................................................................................................................ 6-1
6.2.2
Watchdog Timer Overflow ..................................................................................................................... 6-1
6.3 Operational Description.................................................................................................................................. 6-2
Chapter 7
Power Management
7.1 Overview ........................................................................................................................................................ 7-1
7.2 Power Management Functions........................................................................................................................ 7-1
7.2.1
Register List............................................................................................................................................ 7-3
7.3 Register Descriptions...................................................................................................................................... 7-4
7.3.1
Block Clock Control Register (BCKCTL).............................................................................................. 7-4
7.3.2
Clock Stop Register (CLKSTP).............................................................................................................. 7-7
7.3.3
Clock Gear Control Register (CGBCNT0) ............................................................................................. 7-9
7.3.4
Clock Wait Register (CKWT) .............................................................................................................. 7-10
7.3.5
Stopping Clock Signals to Functional Blocks....................................................................................... 7-11
7.3.6
Clock Gear ............................................................................................................................................ 7-11
7.3.7
HALT Mode ......................................................................................................................................... 7-12
7.3.8
STANDBY Mode ................................................................................................................................. 7-12
7.4 Using Power Management with DRAM....................................................................................................... 7-13
7.4.1
Activating Self Refresh Operation........................................................................................................ 7-13
7.4.2
Deactivating Self Refresh Operation .................................................................................................... 7-13