- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359188 > MPC7457 (飛思卡爾半導體(中國)有限公司) RISC Microprocessor Hardware Specifications PDF資料下載
參數(shù)資料
| 型號： | MPC7457 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | RISC Microprocessor Hardware Specifications |
| 中文描述： | RISC微處理器硬件規(guī)格 |
| 文件頁數(shù)： | 53/68頁 |
| 文件大?。?/td> | 1755K |
| 代理商： | MPC7457 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁當前第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 5
Freescale Semiconductor
53
System Design Information
L1_TSTCLK and TEST[6]. The CKSTP_IN signal should likewise be pulled up through a pull-up resistor (weak or
stronger: 4.7–1 k
) to prevent erroneous assertions of this signal.
In addition, the MPC7457 has one open-drain style output that requires a pull-up resistor (weak or stronger:
4.7–1 k
) if it is used by the system. This pin is CKSTP_OUT.
If pull-down resistors are used to configure BVSEL or L3VSEL, the resistors should be less than 250
(see
Table 16
). Because PLL_CFG[0:4] must remain stable during normal operation, strong pull-up and pull-down
resistors (1 k
or less) are recommended to configure these signals in order to protect against erroneous switching
due to ground bounce, power supply noise or noise coupling.
During inactive periods on the bus, the address and transfer attributes may not be driven by any master and may,
therefore, float in the high-impedance state for relatively long periods of time. Because the MPC7457 must
continually monitor these signals for snooping, this float condition may cause excessive power draw by the input
receivers on the MPC7457 or by other receivers in the system. These signals can be pulled up through weak (10-k
)
pull-up resistors by the system, address bus driven mode enabled (see the
MPC7450 RISC Microprocessor Family
Users’ Manual
for more information about this mode), or they may be otherwise driven by the system during
inactive periods of the bus to avoid this additional power draw. Preliminary studies have shown the additional power
draw by the MPC7457 input receivers to be negligible and, in any event, none of these measures are necessary for
proper device operation. The snooped address and transfer attribute inputs are: A[0:35], AP[0:4], TT[0:4], CI, WT,
and GBL.
If extended addressing is not used, A[0:3] are unused and must be pulled low to GND through weak pull-down
resistors. If the MPC7457 is in 60x bus mode, DTI[0:3] must be pulled low to GND through weak pull-down
resistors.
The data bus input receivers are normally turned off when no read operation is in progress and, therefore, do not
require pull-up resistors on the bus. Other data bus receivers in the system, however, may require pull-ups, or that
those signals be otherwise driven by the system during inactive periods by the system. The data bus signals are:
D[0:63] and DP[0:7].
If address or data parity is not used by the system, and the respective parity checking is disabled through HID0, the
input receivers for those pins are disabled, and those pins do not require pull-up resistors and should be left
unconnected by the system. If all parity generation is disabled through HID0, all parity checking should also be
disabled through HID0, and all parity pins may be left unconnected by the system.
The L3 interface does not normally require pull-up resistors. Unused L3_ADDR signals are driven low when the
SRAM is configured to be less than 1 M in size via L3CR. For example, L3_ADD[18] will be driven low if the
SRAM size is configured to be 2 M; likewise, L3_ADDR[18:17] will be driven low if the SRAM size is configured
to be 1 M.
9.7
JTAG Configuration Signals
Boundary-scan testing is enabled through the JTAG interface signals. The TRST signal is optional in the IEEE
1149.1 specification, but is provided on all processors that implement the PowerPC architecture. While it is possible
to force the TAP controller to the reset state using only the TCK and TMS signals, more reliable power-on reset
performance will be obtained if the TRST signal is asserted during power-on reset. Because the JTAG interface is
also used for accessing the common on-chip processor (COP) function, simply tying TRST to HRESET is not
practical.
The COP function of these processors allows a remote computer system (typically, a PC with dedicated hardware
and debugging software) to access and control the internal operations of the processor. The COP interface connects
primarily through the JTAG port of the processor, with some additional status monitoring signals. The COP port
相關PDF資料 |
PDF描述 |
|---|---|
| MPC7457EC | RISC Microprocessor Hardware Specifications |
| MPC8241TZQ200C | Intergrated Processor Hardware Specifications |
| MPC8241TZQ266C | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT06; Number of Contacts:30; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| MPC8241TZQ266D | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT06; No. of Contacts:30; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| MPC8241 | Intergrated Processor Hardware Specifications |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC7457EC | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:RISC Microprocessor Hardware Specifications |
| MPC745BPX300LE | 功能描述:微處理器 - MPU 255 PBGAREV2.8105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC745BPX350LE | 功能描述:微處理器 - MPU 255 PBGAREV2.8105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC745BVT300LE | 功能描述:微處理器 - MPU GF REV2.8105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MPC745BVT350LE | 功能描述:微處理器 - MPU GF REV2.8105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
發(fā)布緊急采購，3分鐘左右您將得到回復。