參數(shù)資料
型號： MT48LC4M16A2F4-6IT:G
元件分類： DRAM
英文描述： 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PBGA54
封裝： 8 X 8 MM, VFBGA-54
文件頁數(shù)： 22/72頁
文件大?。?/td> 3455K
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAM_2.fm - Rev. N 12/08 EN
29
2000 Micron Technology, Inc. All rights reserved.
64Mb: x4, x8, x16 SDRAM
Commands
Figure 17:
Terminating a READ Burst
Note:
DQM is LOW.
WRITEs
WRITE bursts are initiated with a WRITE command, as shown in Figure 18 on page 30.
The starting column and bank addresses are provided with the WRITE command, and
auto precharge is either enabled or disabled for that access. If auto precharge is enabled,
the row being accessed is precharged at the completion of the burst. For the generic
WRITE commands used in the following illustrations, auto precharge is disabled.
During WRITE bursts, the first valid data-in element will be registered coincident with
the WRITE command. Subsequent data elements will be registered on each successive
positive clock edge. Upon completion of a fixed-length burst, assuming no other
commands have been initiated, the DQs will remain High-Z, and any additional input
data will be ignored (see Figure 19 on page 30). A full-page burst will continue until
terminated. (At the end of the page, it will wrap to column 0 and continue.)
Data for any WRITE burst may be truncated with a subsequent WRITE command, and
data for a fixed-length WRITE burst may be immediately followed by data for a WRITE
command. The new WRITE command can be issued on any clock following the previous
WRITE command, and the data provided coincident with the new command applies to
the new command.
DON’T CARE
CLK
DQ
DOUT
n
T2
T1
T4
T3
T6
T5
T0
COMMAND
ADDRESS
READ
NOP
DOUT
n + 1
DOUT
n + 2
DOUT
n + 3
BURST
TERMINATE
ACTIVE
t RP
T7
CLK
DQ
DOUT
n
T2
T1
T4
T3
T6
T5
T0
COMMAND
ADDRESS
READ
NOP
DOUT
n + 1
DOUT
n + 2
DOUT
n + 3
BURST
TERMINATE
ACTIVE
t RP
T7
X = 1 cycle
CL = 2
CL = 3
X = 2 cycles
BANK a,
COL n
BANK a,
ROW
BANK
(a or all)
BANK a,
COL n
BANK a,
ROW
BANK
(a or all)
TRANSITIONING DATA
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MT48LC4M16A2F4-75 制造商:Micron Technology Inc 功能描述:
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