![](http://datasheet.mmic.net.cn/180000/NT5TU64M16DG-3C_datasheet_11338978/NT5TU64M16DG-3C_51.png)
NT5TU256M4GE / NT5TU128M8GE / NT5TU64M16GG
1Gb DDR2 SDRAM
51
REV 1.0
06 / 2010
No Operation Command
The No Operation Command should be used in cases when the SDRAM is in a idle or a wait state. The purpose of the No
Operation Command is to prevent the SDRAM from registering any unwanted commands between operations. A No
Operation Command is registered when
is low with , , and held high at the rising edge of the clock. A No
Operation Command will not terminate a previous operation that is still executing, such as a burst read or write cycle.
Deselect Command
The Deselect Command performs the same function as a No Operation Command. Deselect Command occurs when
is
brought high, the
, , and signals become dont care.
Input Clock Frequency Change
During operation the DRAM input clock frequency can be changed under the following conditions:
a) During Self-Refresh operation
b) DRAM is in Precharge Power-down mode and ODT is completely turned off.
The DDR2-SDRAM has to be in Precharged Power-down mode and idle. ODT must be allready turned off and CKE must
be at a logic “l(fā)ow” state. After a minimum of two clock cycles after tRP and tAOFD have been satisfied the input clock
frequency can be changed. A stable new clock frequency has to be provided, before
CKE can be changed to a “high” logic
level again. After tXP has been satisfied a DLL RESET command via EMRS(1) has to be issued. During the following DLL
re-lock period of 200 clock cycles, ODT must remain off. After the DLL-re-lock period the DRAM is ready to operate with the
new clock frequency.
Example:
Input frequency change during Precharge Power-Down mode
NOP
T0
T2
T1
T3
T4
Tx
Tx+1
Ty
CMD
NOP
DLL
RESET
Ty+2
Ty+3
CKE
Frequency Change
occurs here
NOP
Frequ.Ch.
Tz
tXP
Stable new clock
before power-down exit
CK, CK
tRP
tAOFD
Minimum 2 clocks
required before
changing the frequency
Ty+1
NOP
Valid
Command
200 clocks
ODT is off during
DLL RESET