
1996 Microchip Technology Inc.
Advance Information
DS40139A-page 15
PIC12C5XX
4.4
OPTION Register
The OPTION register is a 8-bit wide, write-only
register which contains various control bits to
configure the Timer0/WDT prescaler and Timer0.
By executing the
OPTION
instruction, the contents of
the W register will be transferred to the OPTION
register. A RESET sets the OPTION<7:0> bits.
Note that TRIS overrides OPTION control if GPPU is
enabled and GPWU is disabled.
Note:
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin.
If the TOCS bit is set to ‘1’, GP2 is forced
to be an input even if TRIS GP2 = ‘0’
Note:
FIGURE 4-5:
OPTION REGISTER
W-1
GPWU
bit7
W-1
GPPU
6
W-1
T0CS
5
W-1
T0SE
4
W-1
PSA
3
W-1
PS2
2
W-1
PS1
1
W-1
PS0
W = Writable bit
U
= Unimplemented bit
- n = Value at POR reset
Reference Table 4-1 for
other resets.
bit0
bit 7:
GPWU:
Enable wake-up on pin change (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
bit 6:
GPPU
: Enable weak pull-ups (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
bit 5:
T0CS
: Timer0 clock source select bit
1 = Transition on T0CKI pin
0 = Transition on internal instruction cycle clock, Fosc/4
bit 4:
T0SE
: Timer0 source edge select bit
1 = Increment on high to low transition on the T0CKI pin
0 = Increment on low to high transition on the T0CKI pin
bit 3:
PSA
: Prescaler assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
bit 2-0:
PS2:PS0
: Prescaler rate select bits
000
001
010
011
100
101
110
111
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
Bit Value
Timer0 Rate
WDT Rate