
PIC12C5XX
DS40139A-page 42
Advanced Information
1996 Microchip Technology Inc.
COMF
Syntax:
Operands:
Complement f
[ label COMF f,d
0
≤
f
≤
31
d
∈
[0,1]
(f)
→
(dest)
Z
Operation:
Status Affected:
Encoding:
Description:
0010
01df
ffff
The contents of register 'f' are comple-
mented. If 'd' is 0 the result is stored in
the W register. If 'd' is 1 the result is
stored back in register 'f'.
1
1
Words:
Cycles:
Example:
Before Instruction
REG1
After Instruction
REG1
W
COMF
REG1,0
=
0x13
=
=
0x13
0xEC
DECF
Syntax:
Operands:
Decrement f
[ label DECF f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) – 1
→
(dest)
Z
Operation:
Status Affected:
Encoding:
Description:
0000
11df
ffff
Decrement register 'f'. If 'd' is 0 the
result is stored in the W register. If 'd' is
1 the result is stored back in register 'f'.
1
1
Words:
Cycles:
Example:
Before Instruction
CNT
Z
After Instruction
CNT
Z
DECF CNT,
1
=
=
0x01
0
=
=
0x00
1
DECFSZ
Syntax:
Operands:
Decrement f, Skip if 0
[ label DECFSZ f,d
0
≤
f
≤
31
d
∈
[0,1]
(f) – 1
→
d; skip if result = 0
None
Operation:
Status Affected:
Encoding:
Description:
0010
11df
ffff
The contents of register 'f' are decre-
mented. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
If the result is 0, the next instruction,
which is already fetched, is discarded
and an NOP is executed instead mak-
ing it a two cycle instruction.
1
1(2)
Words:
Cycles:
Example:
HERE DECFSZ CNT, 1
GOTO LOOP
CONTINUE
Before Instruction
PC
After Instruction
CNT
if CNT
PC
if CNT
PC
=
address
(HERE)
=
=
=
≠
=
CNT - 1;
0,
address
(CONTINUE)
;
0,
address
(HERE+1)
GOTO
Syntax:
Operands:
Operation:
Unconditional Branch
[ label GOTO k
0
≤
k
≤
511
k
→
PC<8:0>;
STATUS<6:5>
→
PC<10:9>
None
Status Affected:
Encoding:
Description:
101k
kkkk
kkkk
GOTO
is an unconditional branch. The
9-bit immediate value is loaded into PC
bits <8:0>. The upper bits of PC are
loaded from STATUS<6:5>.
GOTO
is a
two cycle instruction.
1
2
Words:
Cycles:
Example:
After Instruction
PC =
GOTO THERE
address
(THERE)