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參數資料
| 型號： | P12C508 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8-Pin, 8-Bit CMOS Microcontroller |
| 中文描述： | 8引腳，8位CMOS微控制器 |
| 文件頁數： | 35/84頁 |
| 文件大?。?/td> | 526K |
| 代理商： | P12C508 |
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1996 Microchip Technology Inc.
Advance Information
DS40139A-page 35
PIC12C5XX
7.9
Power-Down Mode (SLEEP)
A device may be powered down (SLEEP) and later
powered up (Wake-up from SLEEP).
7.9.1
SLEEP
The Power-Down mode is entered by executing a
SLEEP
instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the
SLEEP
instruction was executed (driving
high, driving low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the GP3/MCLR/V
PP
pin low.
For lowest current consumption while powered down,
the T0CKI input should be at V
DD
or V
SS
and the GP3/
MCLR/V
PP
pin must be at a logic high level (V
IHMC
) if
MCLR is enabled.
7.9.2
WAKE-UP FROM SLEEP
The device can wake-up from SLEEP through one of
the following events:
1.
An external reset input on GP3/MCLR/V
PP
pin.
2.
A Watchdog Timer time-out reset (if WDT was
enabled).
3.
A change on input pin GP0, GP1, or GP3
These events cause a device reset. The TO, PD, and
GPWUF bits can be used to determine the cause of
device reset.. The TO bit is cleared if a WDT time-out
occurred (and caused wake-up). The PD bit, which is
set on power-up, is cleared when
SLEEP
is invoked.
The GPWUF bit indicates a change in state while in
SLEEP at pins GP0, GP1, or GP3 (since the last time
there was a file or bit operation on GP port).
The WDT is cleared when the device wakes from
sleep, regardless of the wake-up source.
Caution:
Right before entering SLEEP, read the
input pins. When in SLEEP, wake up
occurs when the values at the pins change
from the state they were in at the last
reading. If a wake-up on change occurs
and the pins are not read before
reentering SLEEP, a wake up will occur
immediately even if no pins change while
in SLEEP mode.
7.10
Program Verification/Code Protection
If the code protection bit has not been programmed,
the on-chip program memory can be read out for
verification purposes.
7.11
ID Locations
Four memory locations are designated as ID locations
where the user can store checksum or other code-
identification numbers. These locations are not
accessible during normal execution but are readable
and writable during program/verify.
Use only the lower 4 bits of the ID locations and
always program the upper 8 bits as '1's.
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