參數(shù)資料
型號: P610ARM-KG
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 40/173頁
文件大小: 897K
代理商: P610ARM-KG
Instruction Set - Shifts
ARM610 Data Sheet
4-12
O
Instruction specified shift amount
When the shift amount is specified in the instruction, it is contained in a 5-bit field which
may take any value from 0 to 31. A logical shift left (LSL) takes the contents of Rm and
moves each bit by the specified amount to a more significant position. The least
significant bits of the result are filled with zeros, and the high bits of Rm which do not
map into the result are discarded, except that the least significant discarded bit
becomes the shifter carry output which may be latched into the C bit of the CPSR when
the ALU operation is in the logical class (see above). For example, the effect of LSL #5
is shown in
·
Figure 4-5: Logical shift left
Figure 4-5: Logical shift left
Note
LSL #0 is a special case, where the shifter carry out is the old value of the CPSR C
flag. The contents of Rm are used directly as the second operand.
A logical shift right (LSR) is similar, but the contents of Rm are moved to less significant
positions in the result. LSR #5 has the effect shown in
·
Figure 4-6: Logical shift right
Figure 4-6: Logical shift right
31
27
26
0
contents of Rm
31
27
26
0
value of operand 2
0
0
0
0
0
carry out
31
5
4
0
contents of Rm
0
0
0
0
0
value of operand 2
carry out
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