參數(shù)資料
型號: P610ARM-KG
廠商: Zarlink Semiconductor Inc.
英文描述: General purpose 32-bit microprocessor
中文描述: 通用32位微處理器
文件頁數(shù): 51/173頁
文件大?。?/td> 897K
代理商: P610ARM-KG
Instruction Set - MUL, MLA
ARM610 Data Sheet
4-23
O
4.6.1 Operand restrictions
The destination register Rd must not be the same as the operand register Rm. R15
must not be used as an operand or as the destination register.
All other register combinations will give correct results, and Rd, Rn and Rs may use
the same register when required.
4.6.2 CPSR flags
Setting the CPSR flags is optional, and is controlled by the S bit in the instruction. The
N (Negative) and Z (Zero) flags are set correctly on the result (N is made equal to bit
31 of the result, and Z is set if and only if the result is zero). The C (Carry) flag is set
to a meaningless value and the V (oVerflow) flag is unaffected.
4.6.3 Assembler syntax
MUL{cond}{S} Rd,Rm,Rs
MLA{cond}{S} Rd,Rm,Rs,Rn
{cond}
two-character condition mnemonic. See
·
Table 4-2:
Condition code summaryon page 4-6.
{S}
set condition codes if S present
Rd, Rm, Rs and Rn
are expressions evaluating to a register number other
than R15.
4.6.4 Examples
MUL
MLAEQS
R1,R2,R3
R1,R2,R3,R4 ; Conditionally R1:=R2*R3+R4,
; setting condition codes.
; R1:=R2*R3
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