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| 型號： | PCI1221GHK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | KPT 11C 11#16 SKT PLUG |
| 中文描述： | PC卡控制器 |
| 文件頁數(shù)： | 61/123頁 |
| 文件大?。?/td> | 1659K |
| 代理商： | PCI1221GHK |
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PCI1221 GHK/PDV
PC CARD CONTROLLERS
SCPS042 – JULY 1998
61
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 21. System Control Register (Continued)
BIT
SIGNAL
TYPE
FUNCTION
15
MRBURSTDN
R/W
Memory read burst enable downstream. When bit 15 is set, memory read transactions are allowed to
burst downstream.
0 = Downstream memory read burst is disabled.
1 = Downstream memory read burst is enabled (default).
14
MRBURSTUP
R/W
Memory read burst enable upstream. When bit 14 is set, the PCI1221 allows memory read transactions
to burst upstream.
0 = Upstream memory read burst is disabled (default).
1 = Upstream memory read burst is enabled.
13
SOCACTIVE
R
Socket activity status. When set, bit 13 indicates access has been performed to or from a PC card and
is cleared upon read of this status bit. This bit is socket dependent.
0 = No socket activity (default)
1 = Socket activity
Reserved. Bit 12 is read only and returns 1 when read.
12
RSVD
R
11
PWRSTREAM
R
Power stream in progress status bit. When set, bit 11 indicates that a power stream to the power switch
is in progress and a powering change has been requested. This bit is cleared when the power stream
is complete.
0 = Power stream is complete and delay has expired.
1 = Power stream is in progress.
10
DELAYUP
R
Power-up delay in progress status. When set, bit 9 indicates that a power-up stream has been sent
to the power switch and proper power may not yet be stable. This bit is cleared when the power-up
delay has expired.
9
DELAYDOWN
R
Power-down delay in progress status. When set, bit 10 indicates that a power-down stream has been
sent to the power switch and proper power may not yet be stable. This bit is cleared when the
power-down delay has expired.
8
INTERROGATE
R
Interrogation in progress. When set, bit 8 indicates an interrogation is in progress and clears when
interrogation completes. This bit is socket dependent.
0 = Interrogation not in progress (default)
1 = Interrogation in progress
7
RSVD
R
Reserved. Bit 7 is read only and returns 0 when read.
6
PWRSAVINGS
R/W
Power savings mode enable. When this bit is set, if a CB card is inserted, idle, and without a CB clock,
the applicable CB state machine will not be clocked.
5
SUBSYSRW
R/W
Subsystem ID (SSID), subsystem vendor ID (SSVID), ExCA ID, and revision register read/write
enable. Bit 5 is shared by functions 0 and 1.
0 = SSID, SSVID, ExCA ID, and revision register are read/write.
1 = SSID, SSVID, ExCA ID, and revision register are read only (default).
4
CB_DPAR
R/W
CardBus data parity SERR signaling enable
0 = CardBus data parity not signaled on PCI SERR
1 = CardBus data parity signaled on PCI SERR
3-2
RSVD
R
Reserved. This bit is read only and returns 0 when read.
1
KEEPCLK
R/W
Keep clock. This bit works with PCI and CB CLKRUN protocols.
0 = Allows normal functioning of both CLKRUN protocols.(default)
1 = Does not allow CB clock or PCI clock to be stopped using the CLKRUN protocols.
0
RIMUX
R/W
RI_OUT/PME multiplex enable.
0 = RI_OUT and PME are both routed to the RI_OUT/PME terminal. If both are enabled
at the same time, RI_OUT has precedence over PME.
1 = Only PME is routed to the RI_OUT/PME terminal.
These bits are global and should be accessed only through function 0.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCI1221PDV | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PCI1225 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PC CARD CONTROLLERS |
| PCI1225GHK | 制造商:Texas Instruments 功能描述: |
| PCI1225PDV | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| PCI-1240U | 制造商:ADVANTECH 制造商全稱:Advantech Co., Ltd. 功能描述:4-axis Stepping and Servo Motor Control Universal PCI Card |
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