參數資料
型號： PCI6420
廠商： Texas Instruments, Inc.
英文描述： Integrated 2-Slot PC Card & Dedicated Flash Media Controller
中文描述： 集成雙槽 PC 卡專用閃存介質控制器
文件頁數： 124/160頁
文件大小： 818K
代理商： PCI6420
5
–
22
5.20 ExCA Global Control Register
This register controls both PC Card sockets, and is not duplicated for each socket. The host interrupt mode bits in
this register are retained for 82365SL-DF compatibility. See Table 5
–
15 for a complete description of the register
contents.
Bit
7
6
5
4
3
2
1
0
Name
ExCA global control
Type
R
R
R
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
Register:
Offset:
ExCA global control
CardBus Socket Address + 81Eh:
Card A ExCA Offset 1Eh
Card B ExCA Offset 5Eh
Type:
Default:
Read-only, Read/Write
00h
Table 5
–
15. ExCA Global Control Register Description
BIT
SIGNAL
TYPE
FUNCTION
7
–
5
RSVD
R
These bits return 0s when read. Writes have no effect.
4
INTMODEB
RW
Level/edge interrupt mode select, card B. This bit selects the signaling mode for the PCI6x20 host interrupt
for card B interrupts. This bit is encoded as:
0 = Host interrupt is edge mode (default).
1 = Host interrupt is level mode.
Level/edge interrupt mode select, card A. This bit selects the signaling mode for the PCI6x20 host interrupt
for card A interrupts. This bit is encoded as:
0 = Host interrupt is edge-mode (default).
1 = Host interrupt is level-mode.
Interrupt flag clear mode select. This bit selects the interrupt flag clear mechanism for the flags in the ExCA
card status change register. This bit is encoded as:
0 = Interrupt flags cleared by read of CSC register (default)
1 = Interrupt flags cleared by explicit writeback of 1
Card status change level/edge mode select. This bit selects the signaling mode for the PCI6x20 host
interrupt for card status changes. This bit is encoded as:
0 = Host interrupt is edge-mode (default).
1 = Host interrupt is level-mode.
Power-down mode select. When this bit is set to 1, the PCI6x20 device is in power-down mode. In
power-down mode the PCI6x20 card outputs are placed in a high-impedance state until an active cycle
is executed on the card interface. Following an active cycle the outputs are again placed in a
high-impedance state. The PCI6x20 device still receives functional interrupts and/or card status change
interrupts; however, an actual card access is required to wake up the interface. This bit is encoded as:
0 = Power-down mode disabled (default)
1 = Power-down mode enabled
One or more bits in this register are cleared only by the assertion of GRST.
3
INTMODEA
RW
2
IFCMODE
RW
1
CSCMODE
RW
0
PWRDWN
RW
相關PDF資料
PDF描述
PCI6421 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
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相關代理商/技術參數
參數描述
PCI6420GHK 功能描述:外圍驅動器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6420ZHK 功能描述:外圍驅動器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6421 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6421GHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
PCI6421ZHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
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