參數(shù)資料
型號: PCI6420
廠商: Texas Instruments, Inc.
英文描述: Integrated 2-Slot PC Card & Dedicated Flash Media Controller
中文描述: 集成雙槽 PC 卡專用閃存介質控制器
文件頁數(shù): 152/160頁
文件大?。?/td> 818K
代理商: PCI6420
8
2
Recommended Operating Conditions (continued)
OPERATION
MIN
NOM
MAX
UNIT
PCI
3.3 V
0.5 VCCP
VCCP
VCCP
VCC(A/B)
VCC(A/B)
VCC(A/B)
VCC
VCC
0.3 VCCP
0.8
5 V
2
V
3.3 V CardBus
0.475 VCC(A/B)
High-level input
voltage
PC Card
3.3 V 16-bit
2
V
VIH
5 V 16-bit
2.4
V
PC(0
2)
Miscellaneous
0.7 VCC
V
2
V
PCI
3.3 V
0
5 V
0
V
3.3 V CardBus
0
0.325 VCC(A/B)
0.8
Low-level input voltage
Low level in ut voltage
PC Card
3.3 V 16-bit
0
V
VIL
5 V 16-bit
0
0.8
V
PC(0
2)
Miscellaneous
0
0.2 VCC
V
0
0.8
V
PCI
0
VCCP
VCCCB
VCC
VCC
VCC
VCC
VI
Input voltage
In ut voltage
PC Card
Miscellaneous
0
V
0
PCI
0
Output voltage
Out ut voltage
PC Card
Miscellaneous
0
V
VO
§
0
tt
Input transition time
In ut transition time
(tr and tf)
PCI and PC Card
Miscellaneous
1
4
ns
0
6
IO
Output current
TPBIAS outputs
5.6
1.3
mA
VID
Differential input
Differential in ut
voltage
Cable inputs during data reception
118
260
mV
Cable inputs during arbitration
168
265
VIC
Common-mode input
Common mode in ut
voltage
TPB cable inputs, source power node
0.4706
2.515
2.015
V
TPB cable inputs, nonsource power node
0.4706
tPU
Power up reset time
GRST input
2
ms
S100 operation
±
1.08
±
0.5
±
0.315
Receive input jitter
Receive in ut jitter
TPA, TPB cable inputs
TPA, TPB cable in uts
S200 operation
ns
S400 operation
B t
Between TPA and TPB
cable inputs
S100 operation
±
0.8
±
0.55
±
0.5
Receive input skew
Receive in ut skew
S200 operation
ns
S400 operation
TA
TJ#
Operating ambient temperature range
0
25
70
°
C
Virtual junction temperature
0
25
115
°
C
Applies to external inputs and bidirectional buffers without hysteresis
Miscellaneous terminals are 1, 2, 12, 17, 111, 112, 125, 167, 181, and 187 for the PDV packaged device and B10, C09, D01, E03, F12, G03,
H02, L17, P17, and P18 for the GHK packaged device (CNA, SCL, SDA, SUSPEND, GRST, CDx, PHY_TEST_MA, and VSx terminals).
§
Applies to external output buffers
For a node that does not source power, see Section 4.2.2.2 in IEEE Std 1394a
2000.
#These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
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