參數(shù)資料
型號(hào)： PCI6420
廠商： Texas Instruments, Inc.
英文描述： Integrated 2-Slot PC Card & Dedicated Flash Media Controller
中文描述： 集成雙槽 PC 卡專用閃存介質(zhì)控制器
文件頁數(shù)： 59/160頁
文件大小： 818K
代理商： PCI6420
3
–
21
The PCI6x20 master is busy. There may be posted data from CardBus to PCI in the PCI6x20 device.
Interrupts are pending.
The CardBus CCLK for the socket has not been stopped by the PCI6x20 CCLKRUN manager.
The PCI6x20 device restarts the PCI clock using the CLKRUN protocol under any of the following conditions:
A 16-bit PC Card IREQ or a CardBus CINT has been asserted by either card.
A CardBus CBWAKE (CSTSCHG) or 16-bit PC Card STSCHG/RI event occurs in the socket.
A CardBus attempts to start the CCLK using CCLKRUN.
A CardBus card arbitrates for the CardBus bus using CREQ.
Bit 1 (KEEPCLK) in the system control register (PCI offset 80h, see Section 4.29) is set.
Data is in any of the FIFOs (receive or transmit).
The master state machine is busy.
There are pending interrupts.
3.9.3
CardBus PC Card Power Management
The PCI6x20 device implements its own card power-management engine that can turn off the CCLK to a socket when
there is no activity to the CardBus PC Card. The PCI clock-run protocol is followed on the CardBus CCLKRUN
interface to control this clock management.
3.9.4
16-Bit PC Card Power Management
The COE bit (bit 7) of the ExCA power control register (ExCA offset 02h/42h/802h, see Section 5.3) and PWRDWN
bit (bit 0) of the ExCA global control register (ExCA offset 1Eh/5Eh/81Eh, see Section 5.20) are provided for 16-bit
PC Card power management. The COE bit places the card interface in a high-impedance state to save power. The
power savings when using this feature are minimal. The COE bit resets the PC Card when used, and the PWRDWN
bit does not. Furthermore, the PWRDWN bit is an automatic COE, that is, the PWRDWN performs the COE function
when there is no card activity.
NOTE:
The 16-bit PC Card must implement the proper pullup resistors for the COE and
PWRDWN modes.
3.9.5
Suspend Mode
The SUSPEND signal, provided for backward compatibility, gates the PRST (PCI reset) signal and the GRST (global
reset) signal from the PCI6x20 device. Besides gating PRST and GRST, SUSPEND also gates PCLK inside the
PCI6x20 device in order to minimize power consumption.
It should also be noted that asynchronous signals, such as card status change interrupts and RI_OUT, can be passed
to the host system without a PCI clock. However, if card status change interrupts are routed over the serial interrupt
stream, then the PCI clock must be restarted in order to pass the interrupt, because neither the internal oscillator nor
an external clock is routed to the serial-interrupt state machine. Figure 3
–
13 is a signal diagram of the suspend
function.
相關(guān)PDF資料
PDF描述
PCI6421 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6611 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6621 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6515 SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
PCI6515GHK SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCI6420GHK 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6420ZHK 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6421 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6421GHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
PCI6421ZHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
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