參數(shù)資料
型號(hào)： PCI6420
廠商： Texas Instruments, Inc.
英文描述： Integrated 2-Slot PC Card & Dedicated Flash Media Controller
中文描述： 集成雙槽 PC 卡專用閃存介質(zhì)控制器
文件頁數(shù)： 34/160頁
文件大?。?/td> 818K
代理商： PCI6420
2
–
18
Table 2
–
13. CardBus PC Card Address and Data Terminals
SOCKET A TERMINAL
SOCKET B TERMINAL
I/O
DESCRIPTION
NAME
NUMBER
NAME
NUMBER
A_CAD31
A_CAD30
A_CAD29
A_CAD28
A_CAD27
A_CAD26
A_CAD25
A_CAD24
A_CAD23
A_CAD22
A_CAD21
A_CAD20
A_CAD19
A_CAD18
A_CAD17
A_CAD16
A_CAD15
A_CAD14
A_CAD13
A_CAD12
A_CAD11
A_CAD10
A_CAD9
A_CAD8
A_CAD7
A_CAD6
A_CAD5
A_CAD4
A_CAD3
A_CAD2
A_CAD1
A_CAD0
E03
D01
D02
D03
E05
B03
A03
E06
C05
B05
A05
B06
A06
C07
B07
B10
G10
F10
C11
B11
A11
E11
C12
A12
E12
B13
C13
B14
A14
C14
F12
A15
B_CAD31
B_CAD30
B_CAD29
B_CAD28
B_CAD27
B_CAD26
B_CAD25
B_CAD24
B_CAD23
B_CAD22
B_CAD21
B_CAD20
B_CAD19
B_CAD18
B_CAD17
B_CAD16
B_CAD15
B_CAD14
B_CAD13
B_CAD12
B_CAD11
B_CAD10
B_CAD9
B_CAD8
B_CAD7
B_CAD6
B_CAD5
B_CAD4
B_CAD3
B_CAD2
B_CAD1
B_CAD0
E13
A16
E14
B16
A17
F14
D17
C19
F15
E18
G15
F17
H14
F19
H15
K18
K13
K14
L17
L18
L19
L15
M18
M19
L13
N17
N18
M14
M15
P18
P19
P17
I/O
CardBus address and data. These signals make up the multiplexed CardBus
address and data bus on the CardBus interface. During the address phase of
a CardBus cycle, CAD31
–
CAD0 contain a 32-bit address. During the data
phase of a CardBus cycle, CAD31
–
CAD0 contain data. CAD31 is the most
significant bit.
A_CC/BE3
A_CC/BE2
A_CC/BE1
A_CC/BE0
B04
A07
C10
B12
B_CC/BE3
B_CC/BE2
B_CC/BE1
B_CC/BE0
D18
G17
K17
M17
I/O
CardBus bus commands and byte enables. CC/BE3
–
CC/BE0 are multiplexed
on the same CardBus terminals. During the address phase of a CardBus cycle,
CC/BE3
–
CC/BE0 define the bus command. During the data phase, this 4-bit
bus is used as byte enables. The byte enables determine which byte paths of
the full 32-bit data bus carry meaningful data. CC/BE0 applies to byte 0
(CAD7
–
CAD0), CC/BE1 applies to byte 1 (CAD15
–
CAD8), CC/BE2 applies to
byte 2 (CAD23
–
CAD16), and CC/BE3 applies to byte 3 (CAD31
–
CAD24).
A_CPAR
A09
B_CPAR
J18
I/O
CardBus parity. In all CardBus read and write cycles, the PCI6x20 device
calculates even parity across the CAD and CC/BE buses. As an initiator during
CardBus cycles, the PCI6x20 device outputs CPAR with a one-CCLK delay. As
a target during CardBus cycles, the PCI6x20 device compares its calculated
parity to the parity indicator of the initiator; a compare error results in a parity
error assertion.
相關(guān)PDF資料
PDF描述
PCI6421 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6611 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6621 DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6515 SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
PCI6515GHK SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCI6420GHK 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6420ZHK 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI Integrated 2-Slot PC Card & Flash Cntrl RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PCI6421 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER
PCI6421GHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
PCI6421ZHK 制造商:Texas Instruments 功能描述:DUAL/SGL SCKT CARDBUS AND ULTRAMEDIA CNTRLR W/ DEDICATED FLA - Trays
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