PC-TEL, Inc.
19
1789W0DOCDAT06A-0299
PCT1789W DATA SHEET
PCT303DW F
UNCTIONAL
D
ESCRIPTION
!
PRELIMINARY
PRELIMINARY
Billing Tone Immunity
In some countries, billing tones generated by the central
office can cause modem connection difficulties. The
PCT303DW enables the modem developer to provide
feedback to the user for problems associated with billing
tones on the line.
Billing tone detection is enabled by setting the BTE bit of
register 16. Depending on line conditions, the billing
tone can be large enough to cause major errors related
to the modem data. If this situation occurs, the BTD bit
of register 17 is set. This bit remains set until the user
sets it to zero or a reset of the device is executed.
The billing tone may only be large enough to overdrive
the receive input. In this case, the ROV bit of register 17
is set, indicating an overdrive situation. This bit remains
set until set to zero or a reset is executed.
Lightning Test
The PCT303DW meets the lightning test requirements
of EN6100-4-5 and FCC part 68.
Safety and Isolation
The PCT303DW meets the requirements of the
European safety specification EN60950 as well as the
requirements of FCC part 68 and UL.
Off-Hook
The communication system generates an off-hook
command by applying logic 0 to the OFHK pin or writing
a logic 1 to bit 0 of control register 5. The OFHK pin must
be enabled by setting bit 1 (OHE) of register 5. With
OFHK at logic 0, the system is in an off-hook state. This
state is used to seize the line for incoming/outgoing calls
and can also be used for pulse dialing. With OFHK at
logic 1, negligible DC current flows through the
hookswitch. When a logic 0 is applied to the OFHK pin,
the hookswitch transistor pair, Q1 & Q2, turn on. The net
effect of the off-hook signal is the application of a
termination impedance across tip and ring and the flow
of DC loop current. The termination impedance has both
an AC and DC component.
When executing an off-hook sequence, the PCT303DW
requires 4620/Fs clock cycles to complete the off-hook
and provide phone-line data on the serial link. This
includes the 12/Fs filter group delay. If necessary, for
the shortest delay, a higher Fs may be established prior
to executing the off-hook, such as an Fs of 10.286 kHz.
Digital Interface
The PCT303DW has two serial interface modes that
support most standard modem DSPs. The M0 and M1
mode pins select the interface mode. The key difference
between these two serial modes is the operation of the
FSYNC signal. Table 9 summarizes the serial mode
definitions.
Table 9 Serial Modes
Mode
0
1
2
3
M1
0
0
1
1
M0
0
1
0
1
Description
FSYNC frames data
FSYNC pulse starts data frame
Slave mode
Reserved
RNG1/
RNG2
RGDT
SDO
DIGITIZED LINE SIGNAL
Figure 10 Ring Detect Timing
0.5–1.5 Sec.
DATA
> 0.2 Sec.
First Ring
0.2–3.0 seconds