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PEB 20321
PEF 20321
Host Memory Organization
Data Sheet
284
2001-02-14
idle state upon reception of 15 contiguous
‘
1
’
-bits or when a receive abort
channel command is active during 15 received bits.
(HDLC mode, Receive direction only, always in conjunction with FI)
Short frame detected
A frame with
≤
16 bits between start flag and end flag or end abort flag
for CRC16
≤
32 bits between start flag and end flag or end abort flag
for CRC32
has been detected. The sequences 7E 7F
H
and 7E FE
H
and 7E FF
H
are
also short frames.
SF is always in conjunction with ERR except for the frames
7E00 007E
H
for CRC16
7E00 0000 007E
H
for CRC32
always in conjunction with FI = 1
1.1 HDLC mode
Receive Direction
One of the following receive errors occurred
–
FCS of the frame was incorrect
–
the bit length of the frame was not divisible by 8
–
the byte length exceeded MFL
–
the frame was stopped by 7F
H
–
the frame could only be partly stored due to
internal buffer overflow of RB
–
the frame was ended by a receive abort channel command
–
the frame could not be transferred to the shared memory completely
because of a HOLD bit set in a Rx descriptor not providing enough
bytes for the frame.
–
the frame was aborted by a fast receive abort channel command
A more detailed error analysis can be performed by the status
information in the Rx descriptor.
1.2 HDLC mode
Transmit Direction
one of the following transmit errors occurred:
–
the last descriptor had HOLD = 1 and FE = 0
–
the last descriptor had NO = 0 and FE = 0
2.1 V.110/X.30 mode
Receive Direction
one of the following receive errors occurred:
–
data could only partly be stored due to internal buffer overflow of RB
–
3 consecutive frames had an error in the synchronization pattern
(loss of synchronism)
–
a fast receive abort channel command was issued
–
the data could not be transferred to the shared memory completely
because of a HOLD bit set in a Rx descriptor not providing enough
bytes for the data
SF:
ERR: