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PEB 20321
PEF 20321
Host Memory Organization
Data Sheet
300
2001-02-14
8. To issue channel commands not affecting the transmit side one should issue
–
TH with the last set value
–
a transmit clear command if neither a transmit off nor a
transmit abort condition is set
–
a transmit off if a transmit off condition is set
–
a transmit abort if a transmit abort condition is set.
9. Bit combinations in the first Tx command group not described are reserved.
10. Set NITBS =
‘
1
’
preferably in conjunction with a transmit initialize and transmit clear
command if TB is to be newly configured, otherwise program NITBS =
‘
0
’
.
11. For new configuration of a channel (
‘
de-allocation of ITBS
’
) consider two cases:
a) if the channel has not been initialized yet: program NITBS =
‘
0
’
, ITBS =
‘
0
’
,
b) after successful initialization: program NITBS =
‘
1
’
, ITBS =
‘
0
’
,
both in conjunction with transmitt off
TFLAG:
Transparent mode Flag; these bits are only used in the transparent mode A
and constitute the fill code for flag stuffing and for flag filtering. These bits
must be set to
‘
0
’
if subchanneling is used in transparent mode A. Bit No. 15
is the first bit of the flag to be received/transmitted.
CS:
CRC Select; only used in HDLC mode. Setting this bit to
‘
1
’
causes the
MUNICH32X to transfer the CRC bits to the data section in the shared
memory. In receive direction the CRC check is carried out whereas in transmit
direction the CRC generation is suppressed, see
Chapter 4
:
Detailed
Protocol Description
for more details.
INV:
Inversion; If this bit is set, all data of the channel transmitted or received by
the MUNICH32X is inverted.
CRC:
Cyclic Redundancy Check; in HDLC mode this bit determines the
CRC generator polynomial: When the CRC bit is set to
‘
1
’
, the 32-bit CRC is
performed, otherwise the 16-bit CRC. For TMB/TMR mode this bit
distinguishes:
TMB: CRC =
‘
0
’
TMR: CRC =
‘
1
’
Note: For all other modes this bit has to be set to
‘
0
’
.
TRV:
Transmission Rate of V.110/X.30. These signals determine the number of
repeated D-bits in a V.110/X.30 frame.