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PEB 20321
PEF 20321
Detailed Protocol Description
Data Sheet
90
2001-02-14
7. For frames not fulfilling check a) no data are transferred to the shared memory
irrespective of CS.
Only an interrupt with the bit FI, SF and (possibly) ERR is generated.
For frames fulfilling check a) but not check b) data is transferred to the shared memory
but the SF bit in the last receive descriptor is set.
8. The check is reported in the RA bit in the last receive descriptor of the frame
RA = 1: The frame was stopped by the sequence 7F
H
RA = 0: The frame was not stopped by the sequence 7F
H
.
Note: A receive descriptor with RA = 1 may also result from a fast receive abort or a
receive abort channel command or from a receive descriptor with set HOLD bit.
Options
The different options for this mode are:
–
Two kinds of FCS are implemented and can be chosen by CRC bit.
CRC = 0: the generator polynomial x
16
+ x
12
+ x
5
+ 1 is used (2 byte FCS of
CCITT Q.921)
CRC = 1: the generator polynomial
x
32
+ x
26
+ x
23
+x
22
+ x
16
+ x
12
+ x
11
+ x
10
+ x
8
+ x
7
+ x
5
+ x
4
+ x
2
+ x + 1 (4 byte FCS)
is used.
–
the transfer of the FCS together with the received data is programmable by the CS bit.
CS = 0: FCS is not transferred to the data section
CS = 1: FCS is transferred to the data section.
Note: FCS is
always
checked irrespective of the CS bit.
Interrupts
The possible interrupts for the mode in receive direction are:
HI:
issued if the HI bit is detected in the receive descriptor (not maskable)
FI:
issued if a received frame has been finished as discussed in 1.b of the protocol
features (also for frames which do not lead to data transfer as discussed in 7. of the
protocol features)
(maskable by FIR in the channel spec.)
IFC: issued if a change of the interframe time-fill state as discussed in 2. has occurred.
(maskable by IFC in the channel spec.)
SF:
a frame not fulfilling check a) has been detected (maskable by SFE in the
channel spec.)