參數(shù)資料
型號： pentium II
廠商： Intel Corp.
英文描述： pentium II processor With On-die Cache Mobile Module Connector 1 (MMC-1)(帶緩存和連接器1的奔II處理器)
中文描述： 奔騰II處理器芯片上緩存手機(jī)模塊連接器1（MMC管理- 1）（帶緩存和連接器1的奔二處理器）
文件頁數(shù)： 4/34頁
文件大?。?/td> 582K
代理商： PENTIUM II
4
Intel
a
Pentium
a
II Processor With On-die Cache Mobile Module MMC-1
FIGURES
Figure 1. Block Diagram of the Pentium II Processor With
On-die Cache Mobile Module MMC-1.....................6
Figure 2. 280-Pin Connector Footprint Pad Numbers,
Module Secondary Side ........................................18
Figure 3. Clock Control States..............................................21
Figure 4. BCLK, TCK, and PICCLK Generic Clock Waveform
at the Processor Core Pin.....................................26
Figure 5. Power-on Sequence Timing..................................29
Figure 6. Instantaneous In-rush Current Model....................30
Figure 7. Instantaneous In-rush Current...............................31
Figure 8. Over Current Protection Circuit .............................32
Figure 9. Spice Simulation Using In-rush Protection
(Example Only) ......................................................33
Figure 10. Board Dimensions................................................35
Figure 11. Board Dimensions- Pin 1 Orientation..................36
Figure 12. Printed Circuit Board Thickness..........................37
Figure 13. Keep-out Zone .....................................................37
Figure 14. Thermal Transfer Plate (A)..................................38
Figure 15. Thermal Transfer Plate (B)..................................39
Figure 16. Standoff Holes, Board Edge Clearance, and EMI
Containment Ring................................................40
Figure 17. Product Tracking Code........................................41
TABLES
Table 1. Module Connector Signal Summary........................ 7
Table 2. Memory Signal Descriptions .................................... 9
Table 3. PCI Signal Description ........................................... 10
Table 4. Processor/PIIX4E/M Sideband Signal
Descriptions............................................................ 11
Table 5. Power Management Signal Descriptions............... 12
Table 6. Clock Signal Descriptions ...................................... 13
Table 7. Voltage Descriptions .............................................. 14
Table 8. JTAG Pins............................................................... 14
Table 9. Miscellaneous Pins................................................. 15
Table 10. Connector Pin Assignments................................. 16
Table 11. Connector Specifications ..................................... 19
Table 12. Configuration Straps for the 82443DX Host Bridge
System Controller................................................. 20
Table 13. Clock State Characteristics.................................. 23
Table 14. POS/STR Power................................................... 23
Table 15. Power Supply Design Specifications
.................. 24
Table 16. AC Specifications (BCLK) at the Processor
Core Pins.............................................................. 25
Table 17. BCLK Signal Quality Specifications at the
Processor Core..................................................... 26
Table 18. Typical Voltage Regulator Efficiency................... 27
Table 19. Voltage Signal Definitions and Sequences ......... 28
Table 20. VR_ON In-rush Current........................................ 29
Table 21. Capacitance Requirements per Power Plane ..... 30
Table 22. Thermal Sensor SMBus Address Table.............. 34
Table 23. Thermal Sensor Configuration Register.............. 35
Table 24. Thermal Design Power Specifications................. 40
Table 25. Environmental Standards..................................... 42
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