參數(shù)資料
型號： PSD813FN
英文描述： Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
中文描述： 場可編程微控制器外圍設備（帶閃存的現(xiàn)場可編程微控制器）
文件頁數(shù)： 15/83頁
文件大?。?/td> 369K
代理商： PSD813FN
Prelimnary
PSD813FN/FH
15
ECSPLDOutput
Port A, B, or DAssignments
ECS0
ECS1
ECS2
ECS3
ECS4
ECS5
ECS6
PA0, PB0
PA1, PB1
PA2, PB2
PA3, PB3
PD0*
PD1*
PD2*
Table 9. ECSPLDOutput Port Assignments
The seven ECSPLD outputs may be driven off the device through Ports A, B, or D, as
shown in Table 9, via the Micro
Cell Allocator. Port selection is specified in the PSDabel
file or assigned by the PSDcompiler.
PLDs
(cont.)
*
Port D has no output enable (.oe) product terms for ECS4-6 outputs.
External Chip Select PLD
The External Chip Select PLD (ECSPLD) provides the means to select external devices.
The output buffer of the ECSPLD can be configured to operate in high slew rate by writing a
“1” to the corresponding bit in the Drive Register. The slew rate is a measurement of the
rise and fall times of the output. A higher slew rate means a faster output response while a
lower slew rate is a slower response. Refer to Table 25 in the I/O Section for setting up the
Drive Register.
Faster transitions are more likely to cause line reflections and system noise than slower
rates. Adjusting the slew rate allows a trade-off between greater speed and noise
sensitivity. The selection should be based on the performance requirements of the system
and its noise characteristics. Set the corresponding bits in the Drive Register to “0” (for
normal speed) or “1” (for fast drive). The default value is zero.
The ECSPLD has 24 inputs as shown in Table 8. Its outputs are combinatorial, of either
polarity, and have one product term each as shown in Figure 5.
Input Source
Input Name
Number of Bits
MCU Address Bus
A[15:0]
16
MCU Control Signals
CNTL[2:0]
3
Power Down Signal
PDN*
1
Page Register
PGR[3:0]
4
Table 8. ECSPLDInputs
*
APD output. When PDN is high, the PSD813FN/FH is in power down mode
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相關代理商/技術參數(shù)
參數(shù)描述
PSD813FN-15J 制造商:WSI 功能描述:
PSD833F2-90J 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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