參數(shù)資料
型號： PSD813FN
英文描述： Field Programmble Microcontroller Peripherals(帶閃存的現(xiàn)場可編程微控制器)
中文描述： 場可編程微控制器外圍設(shè)備（帶閃存的現(xiàn)場可編程微控制器）
文件頁數(shù)： 18/83頁
文件大?。?/td> 369K
代理商： PSD813FN
PSD813FN/FH
Prelimnary
18
Output Micro
Cell
Eight of the Output Micro
Cells are connected to Port C pins (except PC2) and are named
as McellC0-7. The remaining four Micro
Cells can be connected to Port A or Port B and
are named as McellAB4-7. If an McellAB output is not assigned to a specific pin in
PSDabel, the Micro
Cell Allocator will assign it to either Port A or B. Table 10 shows the
Micro
Cells and Port assignment. Seven of the 12 output Micro
Cells are dedicated to
controlling the Flash memory in this multi-chip module.
Max
Data Bit for
Loading or
Reading in
8-Bit Mode
Native
Product
Terms
Borrowed
Product
Terms
Output
Micro
Cell Assignment
Port
PSD8XXF
Assignment
McellC0
McellC1
McellC2
McellC3
McellC4
McellC5
McellC6
McellC7
McellAB4
McellAB5
McellAB6
McellAB7
Port C0
Port C1
*
Port C3
Port C4
Port C5
Port C6
Port C7
Port A4, B4
Port A5, B5
Port A6, B6
Port A7, B7
4
4
4
4
4
4
4
4
3
3
3
3
5
5
5
5
5
5
5
5
6
6
6
6
D0
D1
D2
D3
D4
D5
D6
D7
D4
D5
D6
D7
WRF
RDF
**
A14F
A16F
A17F
A18F
CSF
**
**
**
**
Table 10. Output Micro
Cell Port and Data Bit Assignments
The Product TermAllocator
All Micro
Cells have the same cell architecture except McellC0-McellC7 have four native
product terms and McellAB4-McellAB7 have three native product terms. The GPLD also
has a Product Term Allocator with which the PSDcompiler can automatically borrow product
terms from one Micro
Cell to another. The McellC may borrow up to five product terms
from other Micro
Cells for a total of nine product terms. The McellAB has three native
product terms and can borrow up to six product terms. Borrowing allows Micro
Cell
outputs needing more product terms to use the unused product terms of others and is
transparent to the user.
The architecture of the 12 Output Micro
Cells, as shown in Figure 6, consists of native
product terms and borrowed product terms from other Micro
Cells. The polarity of the
product term input is controlled by the XOR gate. The Micro
Cell can implement either
sequential logic, using the Flip-Flop element, or combinatorial functions. The multiplexor
selects the combinatorial or the sequential logic as the Micro
Cell output. The multiplexor
output can drive a Port pin and has also a feedback path to the AND array inputs.
Micro
Cell Flip-Flop Type
The Flip-Flop in the Micro
Cell can be configured as a D, Toggle, JK or SR type by using
PSDabel in PSDsoft. The flip-flop Clock, Preset and Clear inputs are driven from a product
term of the AND array. Alternatively, the device clock input (CLKIN) can be used for the
flip-flop. The Preset and Clear are active high inputs; the Flip-Flop is clocked by the rising
edge of the clock input.
PLDs
(cont.)
*
*
Internal node only.
**
General purpose use.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD813FN-15J 制造商:WSI 功能描述:
PSD833F2-90J 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD833F2-90JI 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90M 功能描述:SPLD - 簡單可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD833F2-90MI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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