參數(shù)資料
型號: Q67120-C1056SAB-C501G-1EP
英文描述: IC-8-BIT CPU
中文描述: 集成電路8位CPU
文件頁數(shù): 35/121頁
文件大?。?/td> 1000K
代理商: Q67120-C1056SAB-C501G-1EP
Semiconductor Group
6-1
On-Chip Peripheral Components
C501
6
On-Chip Peripheral Components
I/O Ports
The C501 has four 8-bit I/O portst. Port 0 is an open-drain bidirectional I/O port, while ports 1 to 3
are quasi-bidirectional I/O ports with internal pullup resistors. That means, when configured as
inputs, ports 1 to 3 will be pulled high and will source current when externally pulled low. Port 0 will
float when configured as input.
The output drivers of port 0 and 2 and the input buffers of port 0 are also used for accessing external
memory. In this application, port 0 outputs the low byte of the external memory address, time
multiplexed with the byte being written or read. Port 2 outputs the high byte of the external memory
address when the address is 16 bits wide. Otherwise, the port 2 pins continue emitting the P2 SFR
contents. In this function, port 0 is not an open-drain port, but uses a strong internal pullup FET.
6.1
Parallel I/O
6.1.1 Port Structures
Digital I/O
The C501 allows for digital I/O on 32 lines grouped into 4 bidirectional 8-bit ports. Each port bit
consists of a latch, an output driver and an input buffer. Read and write accesses to the I/O ports
P0 through P3 are performed via their corresponding special function registers P0 to P3.
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