參數(shù)資料
型號: Q67120-C1056SAB-C501G-1EP
英文描述: IC-8-BIT CPU
中文描述: 集成電路8位CPU
文件頁數(shù): 62/121頁
文件大小: 1000K
代理商: Q67120-C1056SAB-C501G-1EP
Semiconductor Group
6-28
On-Chip Peripheral Components
C501
6.2.2.3 Capture
In the capture mode there are two options selected by bit EXEN2 in SFR T2CON.
If EXEN2 = 0, timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in SFR T2CON.
This bit can be used to generate an interrupt.
If EXEN2 = 1, timer 2 still does the above, but with added feature that a 1-to-0 transition at external
input T2EX causes the current value in TH2 and TL2 to be captured into RC2H and RC2L,
respectively. In addition, the transition at T2EX causes bit EXF2 in SFR T2CON to be set. The EXF2
bit, like TF2, can generate an interrupt. The capture mode is illustrated in
figure 6-17
.
Figure 6-17
Timer 2 in Capture Mode
The baud rate generator mode is selected by RCLK = 1 and/or TCLK = 1 in SFR T2CON. It will be
described in conjunction with the serial port.
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