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| 型號： | QR0001 |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 440K |
| 代理商： | QR0001 |
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3.0 Client Interface
(Continued)
3.13 Summary of Client Port Field Formats
TABLE 3.10. Client Port FIeld Formats
Tx Port Head Field
Type
Acc
Conn
Srce
Trgt
HOP
TxT
[
1:0
]
TxS
[
31:30
]
TxS
[
29:28
]
TxS
[
27:24
]
TxS
[
23:20
]
TxS
[
19:16
]
TxS
[
15:12
]
TxS
[
11:8
]
TxS
[
7:4
]
TxS
[
3:0
]
0
XX
Conn
XXXX
Trgt
HOP 1
HOP 2
HOP 3
HOP 4
HOP 5
Rx Port Head Field
Type
Acc
Conn
Trgt
HOP
Srce
RxT
[
1:0
]
RxS
[
31:30
]
RxS
[
29:28
]
RxS
[
27:24
]
RxS
[
23:20
]
RxS
[
19:16
]
RxS
[
15:12
]
RxS
[
11:8
]
RxS
[
7:4
]
RxS
[
3:0
]
0
XX
Conn
Trgt
HOP1
HOP2
HOP3
HOP4
HOP5
Srce
Tx and Rx Ports Payload Symbols
T
[
1:0
]
Tx/Rx S
[
31:0
]
1
DATA. User Defined Information
2
FRAME. User Defined Information
Tx and Rx Port Null Symbols
T
[
1:0
]
Tx/Rx S
[
31:0
]
3
Null. Don’t Care
Node ID Format
RxT
[
1:0
]
RxS
[
31:28
]
RxS
[
27:0
]
non-null
Node ID
1 1 1 1 1 1 àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà1
Max ID Format
RxT
[
1:0
]
RxS
[
31:28
]
RxS
[
27:0
]
non-null
Max ID
1 1 1 1 1 1 àààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààààà1
3.14 Readable Registers
The client can read the two internal registers, Diagnostics
Register and Receive Symbol Register at any time, through
inputs RxSEL
[
0:3
]
and outputs RxNBL
[
0:3
]
. The RxS regis-
ter can also be read while RxSTALL is asserted. RxSEL
[
0:3
]
selects a 4-bit field within the 32-bit internal registers and
shows that field on the RxNBL
[
0:3
]
outputs. Diagnostic er-
ror status bits
[
18:8
]
will remain latched until the Quick Ring
is reset.
TABLE 3.11. Diagnostics Register (Read Only)
31:19
18:12
11:8
7:4
3:0
Reserved
Syndrome
Word:
S
[
6:0
]
Error
Status
MaxID
Node ID
Node ID:
Address of the Node.
MaxID:
Largest ID on the ring.
Error Status:
Individual bits are set depending on the origin
of the error.
Bit 8
is set due to an EDC detection.
Bit 9
is set due to an Abort symbol received at the up-
stream port.
Bit 10
is set due to an error in the packets sequence, i.e.,
two consecutive heads. (Detected on the upstream port of
the ring.)
Bit 11
is set due to an invalid address detected (on the
ring).
Syndrome Word:
Points to the bit in error detected through
EDC. All zeros if no error(s).
Reserved:
Reserved for future expansion.
16
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