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| 型號： | QR0001 |
| 文件頁數(shù)： | 9/40頁 |
| 文件大?。?/td> | 440K |
| 代理商： | QR0001 |
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3.0 Client Interface
(Continued)
3.5 Receive Port Timing Relationships
When PIPE is asserted (low level), the type field, RxT, at
time t indicates the type of symbol presented at the output,
RxS, at time t
a
1. See Figure 3.7. This is true as long as
RxSTALL is negated.
If RxSTALL is asserted when PIPE is asserted (pipeline tim-
ing mode):
1. The RxS
[
31:0
]
output will stall at the first non-null
symbol encountered in the pipeline after RxSTALL is
asserted.
The symbol on RxS will persist through next
clock cycle unless it corresponds to a null symbol. The
RxSTALL input signal is only capable of holding a non-
null symbol at the RxS output.
The client may need to examine some symbols within the
symbol stream in order to determine their disposition. It is
highly desirable to do so without employing added data path
buffering external to the controller. QuickRing allows the cli-
ent to examine the contents of the symbol at the RxS output
through a combination of RxSTALL, RxSEL and RxNBL,
even while the RxS output drivers may be disabled.
To further aid in the receive stream management, the sym-
bol type field just entering the Rx Port Block of the receive
pipeline is visible on RxET. Thereby the client can preview
the symbol type in the receive pipeline before it appears on
the RxS outputs. Thus it is possible to detect the presence
of a head, data, or frame in the pipeline even if up to 19
more symbols are stored ahead of it.
When PIPE is negated (high level), then the value of the
type field RxT, TxT at time t corresponds to the value of the
symbol field at the same time t. (SeeFigure 3.8.) When two
QuickRing controllers are connected to form a bridge, the
TxOK is connected to RxSTALL of the other controller.
(Currently, an external flip-flop may be needed to satisfy the
setup/hold times.)
If RxSTALL is asserted when PIPE is negated (high level), at
the next positive edge of clock:
1. RxT is forced to Null and
2. The RxS
[
31:0
]
persists.
To summarize the Client Port Timing:
At the Rx Port, a non-null symbol remains valid at the RxS
output in the presence of RxSTALL.
At the Tx Port, when TxOK negates it indicates that the
FIFO is nearly full and the client must stop transmission
within 20 non-null symbols.
The PIPE input determines how the type fields, RxT and
TxT, identify a symbol as it appears at RxS and TxS respec-
tively.
At the receive port, many different arriving streams may be
multiplexed together. Every switch to a new stream context
is marked by a new head symbol. The multiplexed stream
that is loaded into a controller at a source node is probably
different than the de-multiplexed stream that arrives at the
target node.
The QuickRing protocol does not preserve the order of mul-
tiplexed streams, but it does preserve the first-in-first-out
ordering of each individual stream.
Figure 3.3 relates to Figure 3.9. It shows that even though
stream Q was loaded first, in Figure 3.3, stream R, arrives
first, inFigure 3.9. Notice that at the output, the order within
each individual stream is preserved.
3.5.1 Client Receive Port Interface Recommendations
(PIPE asserted)
It is recommended, when interfacing to the Client Receive
Port, to hold RxSTALL negated during normal operation.
When the Client interface detects a Non-Null type, it may
assert RxSTALL during the next clock cycle to stall that
particular symbol and the next Non-Null type (if available).
See Figure 3.10.
BE AWARE that if RxSTALL is asserted during a clock cycle
of a NON-NULL Type that follows (later in time) a NULL
type, the Receive Client interface will stall a NULL type for
the next clock cycle. A Null Type will be inserted into the
next clock cycle even if the Receive FIFO contains a NON-
NULL type next. This could reduce the performance of the
receive client interface by half. See Figure 3.11.
9
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