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Siemens AG Semiconductors
Version 5.2
Confidential
20/10/1998
25
break state required by the MultiMediaCard specification, otherwise it waits for the start bit of the
response. It detects response time-outs depending on the command. Commands that utilize the
'$7
lines too, cause the controller to trigger or interrupt rosa_mc - the memory controller responsi-
ble for the data path. The end of a transaction is indicated back to the controller, ifrc_eval_resp. This
signal declares the signals ifrc_crcerrorcmd and ifrc_cmdtimeout valid. The response bytes are
send to rosa_rc via the cmd_bus. The CRC is verified in the following way: All bits of a response are
fed serially into the CRC function including the seven CRC bits and the end bit. The result of the
CRC function is neither compared to the incoming CRC bits nor to zero including the CRC bits, but
compared to the CRC polynomial. If the CRC function returns zero excluding the end bit, meaning
everything is ok, then the function must return the CRC polynomial after the end bit was fed into the
function. All else indicates a corrupted response. The CMD CRC is generated with and checked
against the following polynomial:
CRC polynomial: G(x) = x
7
+ x
3
+ 1
M(x) = (start bit) * x
n
+ x
n-1
+...+ (last bit) * x
0
CRC[6...0] = Remainder [(M(x) * x
7
) / G(x)]
n is the number of CRC protected bits: for commands n = 39, for responses n = 39 or n = 120.
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mmcclk
I
This signal indicates a rising edge on the MultiMediaCard bus
&/.
line. It
is active high.
This signal triggers the controller to start a new command/response
sequence. It is active high.
These lines carry the current RCA. The SELECT_CARD command with
RCA = 0 has no response.
This bus carries commands and arguments to rosa_cmd and response to
rosa_rc.
This bus addresses the corresponding source and destination registers for
data on ifrc_cmd_bus.
This signal is asserted as soon as the fsm is not in its idle state. It is active
high.
This signal triggers rosa_rc to evaluate the response and the cmd time-out
and crc error signals. It is asserted after: a command or a time-out or a
response. It is active high.
This signal indicates the result of the compare between the cmd crc regis-
ter and the all ok value. It is only valid with ifrc_eval_resp. It is active high
meaning the transfer was faulty.
This signal indicates that a time-out occurred while waiting for a response.
It is only valid with ifrc_eval_resp. It is active high meaning there was no
response.
This signal triggers rosa_mc to transfer data. It is active high.
This signal interrupts a running data transfer by rosa_mc. It is active high.
This signal is always connected to the MultiMediaCard bus
&0'
line.
rcif_cmdstart
I
rcif_current_rca[4:0]
I
ifrc_cmd_bus[7:0]
IO
ifrc_cmd_addr[4:0]
O
ifrc_cmd_busy
O
ifrc_eval_resp
O
ifrc_crcerrorcmd
O
ifrc_cmdtimeout
O
ifmc_startdat
ifmc_datstop
cmd_in
O
O
I
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