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Siemens AG Semiconductors
Version 5.2
Confidential
20/10/1998
41
This register controls the interrupt handling of the interrupt sources in the Adapter Status, CIM Sta-
tus and MultiMediaCard Status registers.
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This register can be written by the CAM_SET_IRQMASK command
00&0DVN
- MultiMediaCard status interrupt enable.
Each bit enables an interrupt source in the
00&6WDWXV
register. When enabled, each
positive edge of the corresponding card status input will generate an interrupt request on
the application interface
,54B1
output pin.
When disabled, the MultiMediaCard status register continues to reflect the correspond-
ing interrupt sources.
‘1’ - interrupt source enabled,
‘0’ - interrupt source disabled.
0x000000 (default value).
&LP0DVN
- Macro status interrupt enable.
Each bit enables an interrupt source in the
&LP6WDWXV
register. When enabled, each
positive edge of the corresponding macro command status input will generate an inter-
rupt request on the application interface
,54B1
output pin.
When disabled, the
&LP6WDWXV
register continues to reflect the corresponding interrupt
sources.
‘1’ - interrupt source enabled,
‘0’ - interrupt source disabled.
0x00 (default value).
$GD0DVN
- Adapter status interrupt enable.
Each bit enables an interrupt source in the
$GD6WDWXV
register. When enabled, each
positive edge of the corresponding adapter status input will generate an interrupt request
on the application interface
,54B1
output pin.
When disabled, the adapter status register continues to reflect the corresponding inter-
rupt sources.
‘1’ - interrupt source enabled,
‘0’ - interrupt source disabled.
0x00 (default value).
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