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參數(shù)資料
| 型號： | SAA6721E |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 圖形處理器 |
| 英文描述： | SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎) |
| 中文描述： | GRAPHICS PROCESSOR, PBGA292 |
| 封裝： | 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292 |
| 文件頁數(shù)： | 50/72頁 |
| 文件大?。?/td> | 360K |
| 代理商： | SAA6721E |
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1999 May 11
50
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
8.5.1
M
EMORY INTERFACE LIMITATIONS
The timing parameters of the memory access can be programmed to fulfil the timing restrictions of several SDRAM or
SGRAM devices. But there are some limitations, as shown in Table 14.
Table 14
Memory interface limitations
8.5.2
I
NITIALIZATION OF EXTERNAL MEMORY
All SGRAM and SDRAM devices must be powered-up and initialized correctly. The SAA6721E memory interface is
implemented to fulfil the INTEL PC100 SDRAM specification.
Table 15 shows the required programming steps to initialize the memory correctly.
Table 15
Memory initialization programming
8.5.3
F
RAME AND FIELD MEMORY
The memory interface acts as a decoupling unit to adapt the different frame rates at the video input to the panel output.
The external memory is also used for the de-interlacing unit which reconstructs the frames from odd and even fields in
interlaced mode. The algorithm of de-interlacing can be selected by deint_mode (see Table 16).
TIMING SYMBOL
PARAMETER
CONDITIONS
MINIMUM VALUE
(CLOCK PERIODS)
≥
2
CAS latency
Column Address Strobe (CAS)
latency
activate to command delay; Row
Address Strobe (RAS) to CAS delay
RAS to RAS bank activity delay
t
RCD
≥
2
t
RRD
t
RRD
≠
t
RCD
; proposal is
t
RRD
= t
RCD
+ 1
≥
3
t
RP
t
WR
t
RC
SDRAM_burst_length
RAS precharge time
write recovery time
RAS cycle time
≥
3
≥
1
≥
3
≥
2
must be supported by
SDRAM
must be an even number
internally defined; cannot be
changed
burst_seq_length
t
RSC
≥
2
=8
Register Set Cycle (RSC) mode time
STEP
ACTION
REGISTERS
51 to 55
24
50 to 74
24
1
2
3
4
5
SAA6721E Power-on reset
set-up timing parameters
start memory initialization with setting memory_init
set-up all other parameters
release internal memory reset together with other internal resets
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