參數(shù)資料
型號: SAA6721E
廠商: NXP SEMICONDUCTORS
元件分類: 圖形處理器
英文描述: SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎)
中文描述: GRAPHICS PROCESSOR, PBGA292
封裝: 27 X 27 MM, 1.75 MM HEIGHT, PLASTIC, SOT-489-1, BGA-292
文件頁數(shù): 54/72頁
文件大?。?/td> 360K
代理商: SAA6721E
1999 May 11
54
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
8.8
Overlay port
8.8.1
O
VERLAY INSERTION
If ovl_syncs_active is HIGH, the vertical and horizontal
sync signals for the external OSD controller are generated.
The flag ovl_insert_active switches on the insertion of the
information at the overlay port provided by an external
OSD controller into the data stream at the position defined
by ovl_v_offset, ovl_hs_start, and ovl_hs_latency
(see Fig.18).
The incoming data from ports ovl0 and ovl1 is replaced by
the defined colour information and treated as a double
pixel, which will be inserted into the data stream if OVACT
is set. The pixel at port 0 is then the left pixel, and the pixel
at port 1 is the right pixel. The sampling of the ports ovl0
and ovl1 is done on the positive edge of OVCLK in the
event that sample_edge is asserted, otherwise on the
falling edge of OVCLK.
Fig.18 Overlay window positioning.
handbook, full pagewidth
MHB258
OUTPUT FRAME
OVERLAY
WINDOW
ovl_v_offset
ovl_hs_start
ovl_hs_latency
ovl_h_length
ovl_v_length
ovl_vs_start
one line Vsync
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