參數(shù)資料
型號(hào): SC16IS741IPW
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
中文描述: 1 CHANNEL(S), 5M bps, I2C BUS CONTROLLER, PDSO16
封裝: 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
文件頁(yè)數(shù): 34/52頁(yè)
文件大?。?/td> 382K
代理商: SC16IS741IPW
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
34 of 52
NXP Semiconductors
SC16IS741
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Another way for a master to communicate with several different devices would be by using
a ‘repeated START’. After the last byte of the transaction was transferred, including its
acknowledge (or negative acknowledge), the master issues another START, followed by
address byte and data—without effecting a STOP. The master may communicate with a
number of different devices, combining ‘reads’ and ‘writes’. After the last transfer takes
place, the master issues a STOP and releases the bus. Possible data formats are
demonstrated in
Figure 17
. Note that the repeated START allows for both change of a
slave and a change of direction, without releasing the bus. We shall see later on that the
change of direction feature can come in handy even when dealing with a single device.
In a single master system, the repeated START mechanism may be more efficient than
terminating each transfer with a STOP and starting again. In a multimaster environment,
the determination of which format is more efficient could be more complicated, as when a
master is using repeated STARTs it occupies the bus for a long time and thus preventing
other devices from initiating transfers.
Fig 17. I
2
C-bus data formats
002aab458
DATA
SLAVE ADDRESS
master write:
S
W
A
DATA
A
A
P
data transferred
(n bytes + acknowledge)
START condition
STOP condition
acknowledge
acknowledge
acknowledge
write
DATA
SLAVE ADDRESS
master read:
S
R
A
DATA
A
NA
P
data transferred
(n bytes + acknowledge)
START condition
STOP condition
acknowledge
acknowledge
not
acknowledge
read
DATA
SLAVE ADDRESS
combined
formats:
S
R/W
A
DATA
A
A
P
data transferred
(n bytes + acknowledge)
START condition
STOP condition
acknowledge
acknowledge
acknowledge
read or
write
SLAVE ADDRESS
Sr
R/W
A
repeated
START condition
acknowledge
read or
write
direction of transfer
may change at this point
data transferred
(n bytes + acknowledge)
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