參數(shù)資料
型號(hào)： SC16IS741IPW
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
中文描述： 1 CHANNEL(S), 5M bps, I2C BUS CONTROLLER, PDSO16
封裝： 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
文件頁(yè)數(shù)： 5/52頁(yè)
文件大小： 382K
代理商： SC16IS741IPW
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
5 of 52
NXP Semiconductors
SC16IS741
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
[1]
See
Section 7.4 “Hardware reset, Power-On Reset (POR) and software reset”
7.
Functional description
The UART will perform serial-to-I
2
C conversion on data characters received from
peripheral devices or modems, and I
2
C-to-serial conversion on data characters
transmitted by the host. The complete status the SC16IS741 UART can be read at any
time during functional operation by the host.
The SC16IS741 can be placed in an alternate mode (FIFO mode) relieving the host of
excessive software overhead by buffering received/transmitted characters. Both the
receiver and transmitter FIFOs can store up to 64 characters (including three additional
bits of error status per character for the receiver FIFO) and have selectable or
programmable trigger levels.
The SC16IS741 has selectable hardware flow control and software flow control. Hardware
flow control significantly reduces software overhead and increases system efficiency by
automatically controlling serial data flow using the RTS output and CTS input signals.
Software flow control automatically controls data flow by using programmable Xon/Xoff
characters.
The UART includes a programmable baud rate generator that can divide the timing
reference clock input by a divisor between 1 and (2
16
– 1).
V
SS
RTS
9
10
-
O
ground
UART request to send (active LOW). A logic 0 on the RTS pin
indicates the transmitter has data ready and waiting to send. Writing a
logic 1 in the modem control register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset this pin is set to a
logic 1. This pin only affects the transmit and receive operations when
auto RTS function is enabled via the Enhanced Feature Register
(EFR[6]) for hardware flow control operation.
UART clear to send (active LOW). A logic 0 (LOW) on the CTS pin
indicates the modem or data set is ready to accept transmit data from
the SC16IS741. Status can be tested by reading MSR[4]. This pin
only affects the transmit and receive operations when auto CTS
function is enabled via the Enhanced Feature Register EFR[7] for
hardware flow control operation.
UART transmitter output. During the local Loopback mode, the TX
output pin is disabled and TX data is internally connected to the
UART RX input.
UART receiver input. During the local Loopback mode, the RX input
pin is disabled and TX data is connected to the UART RX input
internally.
device hardware reset (active LOW)
[1]
Crystal input or external clock input. Functions as a crystal input or as
an external clock input. A crystal can be connected between XTAL1
and XTAL2 to form an internal oscillator circuit (see
Figure 11
).
Alternatively, an external clock can be connected to this pin.
Crystal output or clock output. (See also XTAL1.) XTAL2 is used as a
crystal oscillator output.
CTS
11
I
TX
12
O
RX
13
I
RESET
XTAL1
14
15
I
I
XTAL2
16
O
Table 2.
Symbol
Pin description
…continued
Pin
Type Description
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