- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄372283 > SST-MELODY-DAP SST-Melody®:-DAP: Audio Processor Data Sheet (Rev. 0. 10/02) PDF資料下載
參數(shù)資料
| 型號(hào)： | SST-MELODY-DAP |
| 英文描述： | SST-Melody®:-DAP: Audio Processor Data Sheet (Rev. 0. 10/02) |
| 文件頁(yè)數(shù)： | 13/24頁(yè) |
| 文件大?。?/td> | 585K |
| 代理商： | SST-MELODY-DAP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)
REV. 0
SST-Melody-DAP
–13–
Full Memory Mode Pins (Mode C = 0)
Mnemonic
No. of Pins
I/O
Function
A13:0
D23:0
14
24
O
I/O
Address Output Pins for Program, Data, Byte, and I/O Spaces
Data I/O Pins for Program, Data, Byte, and I/O Spaces
(8 MSBs are also used as Byte Memory Addresses)
Host Mode Pins (Mode C = 1)
Mnemonic
No. of Pins
I/O
Function
IAD15:0
A0
16
1
I/O
O
IDMA Port Address/Data Bus
Address Pin for External I/O, Program, Data, or
Byte Access
*
Data I/O Pins for Program, Data, Byte, and I/O Spaces
IDMA Write Enable
IDMA Read Enable
IDMA Address Latch Pin
IDMA Select
IDMA Port Acknowledge Configurable in Mode D; Open Drain
D23:8
IWR
IRD
IAL
IS
IACK
16
1
1
1
1
1
I/O
I
I
I
I
O
*
In Host Mode, external peripheral addresses can be decoded using the A0,
CMS
,
PMS
,
DMS
, and
IOMS
signals.
Memory Interface Pins
The SST-Melody-DAP processor can be used in one of two modes: Full Memory Mode, which allows BDMA operation with full exter-
nal overlay memory and I/O capability, or Host Mode, which allows IDMA operation with limited external addressing capabilities. The
operating mode is determined by the state of the Mode C Pin during
RESET
and cannot be changed while the processor is running.
The following tables list the active signals at specific pins of the DSP during either of the two operating modes (Full Memory or
Host). A signal in one table shares a pin with a signal from the other table, with the active signal determined by the mode set. For the
shared pins and their alternate signals (e.g., A4/IAD3), refer to the package pinout tables.
Table IV. Pin Terminations
1, 2, 3, 4
Table IV shows the recommendations for terminating unused pins.
I/O Three-State
Mnemonic
(Z)
Reset
State
Hi-Z
5
Caused By
Unused Configuration
XTAL
CLKOUT
A13:1 or
IAD 12:0
A0
D23:8
D7 or
IWR
D6 or
IRD
D5 or
IAL
D4 or
IS
D3 or
IACK
D2:0 or
IAD15:13
I
O
O (Z)
I/O (Z)
O (Z)
I/O (Z)
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
I/O (Z)
I
O
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
I
Hi-Z
Float
Float
Float
Float
Float
Float
Float
High (Inactive)
Float
High (Inactive)
Float
Low (Inactive)
Float
High (Inactive)
Float
Float
Float
Float
BR
,
EBR
IS
BR
,
EBR
BR
,
EBR
BR
,
EBR
BR
,
EBR
BR
,
EBR
BR
,
EBR
BR
,
EBR
I/O (Z)
I/O (Z)
Hi-Z
Hi-Z
BR
,
EBR
IS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SST112-T1 | TRANSISTOR J-FET SOT-23 |
| SST113-T1 | TRANSISTOR J-FET SOT-23 |
| SST177-T1 | TRANSISTOR J-FET SOT-23 |
| SST1A1000B | Analog IC |
| SST1A800B | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST-NAS-DN1 | 制造商:Molex 功能描述:DIAG, DEVICENET, NETALYTIX, S/W |
| SSTP600240D25 | 制造商:Teledyne Industrial 功能描述: |
| SSTPAD | 制造商:LINEAR 制造商全稱(chēng):LINEAR 功能描述:PICO AMPERE DIODES |
| SSTPAD1 | 制造商:LINEAR 制造商全稱(chēng):LINEAR 功能描述:PICO AMPERE DIODES |
| SSTPAD10 | 制造商:LINEAR 制造商全稱(chēng):LINEAR 功能描述:PICO AMPERE DIODES |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。