參數(shù)資料
型號(hào): T7507
元件分類(lèi): Codec
英文描述: T7507 Quad PCM Codec with Filters, Termination Impedance, and Hybrid Balance
中文描述: T7507四路PCM編解碼器與過(guò)濾器,終端阻抗,以及混合平衡
文件頁(yè)數(shù): 23/30頁(yè)
文件大小: 558K
代理商: T7507
Lucent Technologies Inc.
23
Data Sheet
August 1999
Termination Impedance, and Hybrid Balance
T7507 Quad PCM Codec with Filters,
Microprocessor Interface
Table 24. T7507 Microprocessor Interface Timing
Frequency of CCLK = 2.048 MHz.
Symbol
tCCLCCH
tCCHCCL
tCCHCCH
tCCH1CCH2 Rise Time of CCLK
tCCL1CCL2
Fall Time of CCLK
tCSLCCL
CSEL
Low to CCLK Transition
Parameter
Test Conditions
Measured from first
CCLK low transition
Measured from eighth
CCLK low transition
Min
160
160
488
50
Max
50
50
Unit
ns
ns
ns
ns
ns
ns
Time of CCLK Low
Time of CCLK High
Period of CCLK
tCCLCSH
CCLK Low to
CSEL
High
30
ns
tCIVCCL
tCCLCIX
tCSHCSL
tSU1BO2
tSU2BO1
tSU1RD
tSU2RD
tENL
Setup Time, Data Input/Output Valid to CCLK Low
Hold Time, CCLK Low to Data Input/Output Invalid
Minimum Time Between Writes
Setup Time for B0—B1 Data
Setup Time for B0—B1 Data
Setup Time for RD1, RD2, RD3 Data
Setup Time for RD1, RD2, RD3 Data
Enable Pulse Width
50
50
50
488
488
488
488
977
ns
ns
ns
ns
ns
ns
ns
ns
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