參數(shù)資料
型號(hào): T7507
元件分類: Codec
英文描述: T7507 Quad PCM Codec with Filters, Termination Impedance, and Hybrid Balance
中文描述: T7507四路PCM編解碼器與過(guò)濾器,終端阻抗,以及混合平衡
文件頁(yè)數(shù): 25/30頁(yè)
文件大?。?/td> 558K
代理商: T7507
Lucent Technologies Inc.
25
Data Sheet
August 1999
Termination Impedance, and Hybrid Balance
T7507 Quad PCM Codec with Filters,
Timing Characteristics
Table 25. Clock Section
See Figures 12—14.
Table 26. T7507 Transmit Section
(Delayed Timing)
See Figure 12.
* Timing parameter tMCLDZ is referenced to a high-impedance state.
Table 27. T7507 Transmit Section
(Nondelayed Timing)
See Figure 13.
* Timing parameter tMCHDZ is referenced to a high-impedance state.
Table 28. T7507 Receive Section
See Figures 12—14.
Symbol
tMCHMCL1
tCDC
tMCH1MCH2
tMCL2MCL1
Parameter
Test Conditions
Min
97
40
0
Typ
Max
60
15
Unit
ns
%
ns
Clock Pulse Width
Duty Cycle, MC
Clock Rise and
Fall Time
Symbol
tMCHDV
tMCHDV1
tMCLDZ*
tSPHMCL
tMCLSPH
tSPLMCL
tSPHSPL
Parameter
Test Conditions
0 < C
LOAD
< 100 pF
0 < C
LOAD
< 100 pF
C
LOAD
= 0
Min
0
0
15
50
50
50
0.1
Typ
Max
60
60
100
Unit
ns
ns
ns
ns
ns
ns
μs
Data Enabled on TS Entry
Data Delay from MC
Data Float on TS Exit
Frame-sync Hold Time
Frame-sync High Setup
Frame-sync Low Setup
Frame-sync Pulse Width
125 – tMCHMCH
Symbol
tSPHDV
tMCHDV1
tMCHDZ*
tSPHMCL
tMCLSPH
tSPLMCL
tSPHSPL
Parameter
Test Conditions
0 < C
LOAD
< 100 pF
0 < C
LOAD
< 100 pF
C
LOAD
= 0
Min
0
0
0
50
50
50
0.1
Typ
Max
80
60
30
Unit
ns
ns
ns
ns
ns
ns
μs
Data Enabled on TS Entry
Data Delay from FS
X
Data Float on TS Exit
Frame-sync Hold Time
Frame-sync High Setup
Frame-sync Low Setup
Frame-sync Pulse Width
125 – tMCHMCH
Symbol
tDVMCL
tMCLDV
tSPHMCL
tSPLMCL
Parameter
Test Conditions
Min
30
15
50
50
Typ
Max
Unit
ns
ns
ns
ns
Receive Data Setup
Receive Data Hold
Frame Separation Hold Time
Frame Separation Low Setup
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