參數(shù)資料
型號: TMS320VC5409PGE-80
廠商: Texas Instruments
文件頁數(shù): 33/93頁
文件大?。?/td> 0K
描述: IC FIXED POINT DSP 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: TMS320C54x
類型: 定點(diǎn)
接口: 主機(jī)接口,McBSP
時(shí)鐘速率: 80MHz
非易失內(nèi)存: ROM(32 kB)
芯片上RAM: 64kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
配用: 296-15829-ND - DSP STARTER KIT FOR TMS320C5416
Functional Overview
39
April 1999 Revised October 2008
SPRS082F
3.3.5.2
DMA External Transfer
Unlike the 5410, the 5409 DMA mode control register (DMMCRx) has two additional bits; DLAXS
(DMMCRn[5]) and SLAXS (DMMCRn[11]). These new bits specify the on/off-chip memory for the source and
destination of the program/data/IO spaces.
When DLAXS is set to 0 (default), the DMA does not perform an external access for the destination. When
DLAXS is set to 1, the DMA performs an external access to the destination location.
When SLAXS is set to 0 (default), the DMA does not perform an external access for the source. When
DLAXS is set to 1, the DMA performs an external access from the source location.
Two new registers are added to the 5409 DMA to support DMA accesses to/from DMA extended data memory,
page 1 to page 127.
The DMA extended source data page register (XSRCDP[6:0]) is located at subbank address 028h.
The DMA extended destination data page register (XDSTDP[6:0]) is located at subbank address 029h.
3.3.5.3
DMA Memory Map
The DMA memory map, as shown in Figure 310, allows DMA transfers to be unaffected by the status of the
MP/MC, DROM, and OVLY bits.
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