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參數(shù)資料
| 型號： | TPS650732TRSLRQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 0.4 MM PITCH, GREEN, PLASTIC, QFN-48 |
| 文件頁數(shù)： | 18/90頁 |
| 文件大?。?/td> | 1375K |
| 代理商： | TPS650732TRSLRQ1 |
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IIN -MAX
900mA
500mA
150mA
750mA
400mA
I O
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I BA
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www.ti.com
SLVSAP7 – JANUARY 2011
POWER DOWN
The charger remains in a power down mode when the input voltage at the AC or USB pin is below the
under-voltage lockout threshold VUVLO. During the power down mode the host commands at the control pins are
not interpreted.
POWER-ON RESET
The charger resets when the input voltage at the AC or USB pin enters the valid range between VUVLO and
VOVLO. All internal timers and other circuit blocks are reset. The device then waits for a time period TDGL(PGOOD),
after which CHARGER ACTIVE Bit indicates the input power status, and the Iset pin is interpreted.
POWER-PATH MANAGEMENT
There are two inputs to the power path called AC and USB. Both inputs support the same voltage rating but are
typically set to a different current limit with AC beeing at the higher limit and USB at the lower. If voltage is
applied at both inputs and both are enabled in register PPATH1 (default setting), AC will be preferred over USB.
In this case, the deivce is only powered from AC and there is no current from USB. If voltage at AC is removed,
the USB input will become and is powered from USB. The current at the input pin AC or USB of the power path
manager is shared between charging the battery and powering the system load on the SYS pin. Priority is given
to the system load. The input current is monitored continuously. If the sum of the charging and system load
currents exceeds the preset maximum input current (programmed internally by I2C), the charging current is
reduced automatically. See the electrical characteristics or the register desciption for the default current limit on
AC and USB for the different family members.
Figure 26 illustrates what happens in an example case where the battery fast-charge current is set to 500mA, the
input current limit is set at 900mA and the system load varies from 0 to 750mA.
Figure 26. Power Path Functionality
SYS Output
The SYS pin is the output of the power path. When is turned off and there is no voltage at AC or USB, the SYS
output is disconnected internally from the battery. When is turned on by pulling PB_IN =LOW, the voltage at SYS
will ramp with a soft-start. During soft start, the voltage at SYS is ramped with a 30mA current source until the
voltage reached 1.8V. During the soft start, the SYS pin must not be loaded by an external load.
BATTERY CHARGING
When Bit CHARGER ENABLE in register CHGCONFIG1 is set to 1, battery charging can begin. First, the device
checks for a short-circuit on the BAT pin: IBAT(SC) is turned on till the voltage on the BAT pin rises above VBAT(SC).
If conditions are safe, it proceeds to charge the battery.
The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current regulation)
and a constant voltage tapering-off (voltage regulation). In all charge phases, an internal control loop monitors
the IC junction temperature and reduces the charge current if the internal temperature threshold is exceeded.
Figure 27 shows what happens in each of the three phases:
Copyright 2011, Texas Instruments Incorporated
25
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