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參數(shù)資料
| 型號： | TPS650732TRSLRQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 0.4 MM PITCH, GREEN, PLASTIC, QFN-48 |
| 文件頁數(shù)： | 24/90頁 |
| 文件大小： | 1375K |
| 代理商： | TPS650732TRSLRQ1 |
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SLVSAP7 – JANUARY 2011
www.ti.com
voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor
to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the
control logic will turn off the switch. The current limit comparator will also turn off the switch in case the current
limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low
Side MOSFET rectifier is turned on and the inductor current will ramp down. The current flows now from the
inductor to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET
rectifier.
The next cycle will be initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on
the on the High Side MOSFET switch.
The DC-DC converters operate synchronized to each other, with converter 1 as the master. A phase shift of 180°
between converter 1 and converter 2 decreases the input RMS current. Therefore smaller input capacitors can
be used. Converter 3 operates in phase with converter 1.
DCDC1 Converter
The output voltage for converter 1 is set to a fixed voltage internally in register DEFDCDC1. The voltage can be
changed using the I2C interface. The default settings are given in Table 1.
Optionally the voltage can be set by an external resistor divider if configured in register DEFDCDC1.
DCDC2 Converter
The VDCDC2 pin must be directly connected to the DCDC2 converter's output voltage. The DCDC2 converter's
output voltage can be selected via the DEFDCDC2 pin or optionally by changing the values in registers
DEFDCDC2_LOW and DEFDCDC2_HIGH. If pin DEFDCDC2 is pulled to GND, register DEFDCDC2_LOW
defines the output voltage. If the pin DEFDCDC2 is driven HIGH, register DEFDCDC2_HIGH defines the output
voltage. Therefore, the voltage can either be changed between two values by toggling pin DEFDCDC2 or by
changing the register values. Default voltages for DCDC1, DCDC2 and DCDC3 are:
Table 1. Default Voltages
DCDC1
DCDC2
DCDC3
DEFDCDC2=LOW
DEFDCDC2=HIGH
DEFDCDC3=LOW
DEFDCDC3=HIGH
DCDC3 Converter
The VDCDC3 pin must be directly connected to the DCDC3 converter's output voltage. The DCDC3 converter's
output voltage can be selected via the DEFDCDC3 pin or optionally by changing the values in registers
DEFDCDC3_LOW and DEFDCDC3_HIGH. If pin DEFDCDC3 is pulled to GND, register DEFDCDC3_LOW
defines the output voltage. If the pin DEFDCDC3 is driven HIGH, register DEFDCDC3_HIGH defines the output
voltage. Therefore, the voltage can either be changed between two values by toggling pin DEFDCDC3 or by
changing the register values.
LDO2 can optionally be forced to follow the voltage defined for DCDC3 by setting Bit LDO2 TRACKING in
register DEFLDO2.
POWER SAVE MODE
The Power Save Mode is enabled by default. If the load current decreases, the converter will enter Power Save
Mode operation automatically. During Power Save Mode the converter skips switching and operates with
reduced frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. The
converter will position the output voltage typically +1% above the nominal output voltage. This voltage positioning
feature minimizes voltage drops caused by a sudden load step.
The transition from PWM Mode to PFM Mode occurs once the inductor current in the Low Side MOSFET switch
becomes 0.
30
Copyright 2011, Texas Instruments Incorporated
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