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參數(shù)資料
| 型號(hào)： | TPS650732TRSLRQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PQCC48 |
| 封裝： | 6 X 6 MM, 0.4 MM PITCH, GREEN, PLASTIC, QFN-48 |
| 文件頁(yè)數(shù)： | 20/90頁(yè) |
| 文件大?。?/td> | 1375K |
| 代理商： | TPS650732TRSLRQ1 |
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SLVSAP7 – JANUARY 2011
If the BAT pin voltage falls below VLOWV in the battery detection test, it indicates that the battery has been
removed. The device then checks for battery insertion: it turns on FET Q2 and sources IPRECHG out of the BAT
pin for duration tDET. If the voltage does not rise above VRCH, it indicates that a battery has been inserted, and a
new charge cycle can begin. If, however, the voltage does rise above VRCH, it is possible that a fully charged
battery has been inserted. To check for this, IBAT(DET) is pulled from the battery for tDET: if the voltage falls below
VLOWV, a battery is not present. The device keeps looking for the presence of a battery.
Charge Termination On/Off:
Charge termination can be disabled by setting the Bit CHARGE TERMINATION ON/OFF in register
CHGCONFIG1 to logic high. When termination is disabled, the device goes through the pre-charge, fast-charge
and CV phases, then remains in the CV phase – the charger behaves like an LDO with an output voltage equal
to VBAT(REG), able to source current up to ICHG or IIN-MAX, whichever is lesser. Battery detection is not performed.
Timers:
The charger in has internal safety timers for the pre-charge and fast-charge phases to prevent potential damage
to either the battery or the system. The default values for the timers can be changed in registers CHGCONFIG1
and CHGCONFIG3. The timers can be disabled by clearing Bit SAFETY TIMERS ENABLE in register
CHGCONFIG1. (Note that the timers are disabled when termination is disabled: Bit CHARGE TERMINATION
ON/OFF in register CHGCONFIG1 =1).
Dynamic Timer Function:
The following events can reduce the charging current and increase the timer durations in the fast charge phase:
1. The system load current increases, and the DPPM loop reduces the available charging current
2. The input current is reduced because the input voltage has fallen to VIN-LOW
3. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
In each of these events, the internal timers are slowed down proportionately to the reduction in charging current.
Note also that whenever any of these events occurs, termination detection is disabled.
A modified charge cycle with the thermal loop active is shown in Figure 28.
Copyright 2011, Texas Instruments Incorporated
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