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參數(shù)資料
| 型號(hào)： | TS83102G0BMGS |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152 |
| 封裝： | 21 X 21 MM, 1.27 MM PITCH, HERMETIC SEALED, CERAMIC, CGA-152 |
| 文件頁數(shù)： | 23/54頁 |
| 文件大小： | 2622K |
| 代理商： | TS83102G0BMGS |
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3
0935B–BDC–06/08
e2v semiconductors SAS 2008
TS83102G0BMGS
3.
Specification
Note:
Absolute maximum ratings are short term limiting values (referenced to GND = 0V), to be applied individually, while other
parameters are within specified operating conditions. Long exposure to maximum ratings may affect device reliability. All inte-
grated circuits have to be handled with appropriate care to avoid damage due to ESD. Damage caused by inappropriate
handling or storage could range from performance degradation to complete failure.
Table 3-1.
Absolute Maximum Ratings
Parameter
Symbol
Comments
Value
Unit
Positive supply voltage
V
CC
GND to 6.0
V
Digital negative supply voltage
DVEE
GND to –5.7
V
Digital positive supply voltage
V
PLUSD
GND – 1.1 to 2.5
V
Negative supply voltage
VEE
GND to –5.5
V
Maximum difference between negative
supply voltages
DVEE to VEE
0.3
V
Analog input voltages
VIN or VINB
–1.5 to 1.5
V
Maximum difference between VIN and VINB
VIN - VINB
–1.5 to 1.5
V
Clock input voltage
V
CLK or VCLKB
–1 to 1
V
Maximum difference between VCLK and
VCLKB
V
CLK - VCLKB
–1 to 1
Vpp
Static input voltage
V
D
GA, SDA
–5 to 0.8
V
Digital input voltage
V
D
SDAEN, DRRB, B/GB,
PGEB, DECB
–5 to 0.8
V
Digital output voltage
VO
V
PLUSD min. operating –2.2 to
VPLUSD max. operating + 0.8
V
Junction temperature
TJ
130
°C
Table 3-2.
Recommended Conditions of Use
Parameter
Symbol
Comments
Min
Typ
Max
Unit
Positive supply voltage
VCC
4.7555.25
V
Positive digital supply voltage
VPLUSD
Differential ECL output
compatibility
–0.9
–0.8
–0.7
V
LVDS output compatibility
1.375
1.45
1.525
V
Grounded(1)
Maximum operating VPLUSD
1.7
V
Negative supply voltages
VEE, DVEE
–5.25
–5.0
–4.75
V
Differential analog input
voltage (full-scale)
V
IN, VINB
VIN - VINB
50
Ω differential or single-ended
±113
450
±125
500
±137
550
mV
mVpp
Clock input power level
(ground common mode)
PCLK, PCLKB
50
Ω single-ended clock input or
100
Ω differential clock
(recommended)
–4
0
4
dBm
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| TS831-3I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
| TS831-3ID | 功能描述:監(jiān)控電路 2.71V Micropower AL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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