參數(shù)資料
型號(hào): TS83102G0BMGS
廠商: E2V TECHNOLOGIES PLC
元件分類: ADC
英文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152
封裝: 21 X 21 MM, 1.27 MM PITCH, HERMETIC SEALED, CERAMIC, CGA-152
文件頁數(shù): 54/54頁
文件大?。?/td> 2622K
代理商: TS83102G0BMGS
9
0935B–BDC–06/08
e2v semiconductors SAS 2008
TS83102G0BMGS
Table 3-5.
AC Performance at Cold Temperature (T
C Min)
Parameter
Test
Level
Symbol
Min
Typ
Max
Unit
AC Performance Condition
–1 dBFS single-ended input mode; 50% clock duty cycle; 0 dBm differential clock (CLK, CLKB); binary output data format
Signal-to-noise and distortion ratio
Fs = 1 Gsps
Fin = 100 MHz
Fs = 1.4 Gsps
Fin = 700 MHz
Fs = 1.4 Gsps
Fin = 1950 MHz
Fs = 2 Gsps
Fin = 2 GHz
4SINAD
38
37
36
40
38
dB
Effective number of bits
Fs = 1 Gsps
Fin = 100 MHz
Fs = 1.4 Gsps
Fin = 700 MHz
Fs = 1.4 Gsps
Fin = 1950 MHz
Fs = 2 Gsps
Fin = 2 GHz
4ENOB
6.0
5.8
5.7
6.3
6.1
6.0
Bit
Signal to noise ratio
Fs = 1 Gsps
Fin = 100 MHz
Fs = 1.4 Gsps
Fin = 700 MHz
Fs = 1.4 Gsps
Fin = 1950 MHz
Fs = 2 Gsps
Fin = 2 GHz
4SNR
46
45
43
47
46
44
dB
Total harmonic distortion
Fs = 1 Gsps
Fin = 100 MHz
Fs = 1.4 Gsps
Fin = 700 MHz
Fs = 1.4 Gsps
Fin = 1950 MHz
Fs = 2 Gsps
Fin = 2 GHz
4
ITHDI
38
37
40
39
dB
Spurious free dynamic range
Fs = 1 Gsps
Fin = 100 MHz
Fs = 1.4 Gsps
Fin = 700 MHz
Fs = 1.4 Gsps
Fin = 1950 MHz
Fs = 2 Gsps
Fin = 2 GHz
4
ISFDRI
39
38
37
42
40
dBC
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