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參數(shù)資料
| 型號(hào)： | TVP3010-110 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Hardware Cursor, GAMMA Correction VIP(110MHz,高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板) |
| 中文描述： | 硬件光標(biāo)，伽瑪校正貴賓（110MHz的，高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板） |
| 文件頁數(shù)： | 18/100頁 |
| 文件大?。?/td> | 571K |
| 代理商： | TVP3010-110 |
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2–4
2.2.1
To load the color palette, the MPU must first write to the address register (write mode) with the address where
the modification is to start. This is then followed by three successive writes to the palette holding register
with eight bits of red, green, and blue data. After the blue write cycle, the three bytes of color data are
concatenated into a 24-bit word that is then written to the RAM location specified by the address register.
The address register then increments to the next location, which the MPU may modify by simply writing
another sequence of red, green, and blue data. A block of color values in consecutive locations may be
written to by writing the start address and performing continuous red, green, and blue write cycles until the
entire block has been written.
2.2.2
Reading From Color-Palette RAM
Reading from the palette is performed by writing to the address register (read mode) with the location to be
read. This then initiates a transfer from the palette RAM into the holding register, followed by an increment
of the address register. Three successive MPU reads from the holding register produce red, green, and blue
color data (6 or 8 bits depending on the 8/6 mode) for the specified location. Following the blue read cycle,
the contents of the color-palette RAM at the address specified by the address register are copied into the
holding register and the address register is again incremented. As with writing to the palette, a block of color
values in consecutive locations may be read by writing the start address and performing continuous red,
green, and blue read cycles until the entire block has been read. Since the color-palette RAM is dual ported,
the RAM may be read during active display without disturbing the video.
2.2.3
Palette-Page Register
The palette-page register appears as an 8-bit register on the extended register map (see Section 2.1). Its
purpose is to provide high-speed color changing by removing the need for palette reloading. When using
1, 2, or 4 bit planes, the additional planes are provided from the page register. When using four bit planes,
the pixel inputs specify the lower four bits of the palette address with the upper four bits specified from the
page register. This gives the user the capability of selecting from 16 palette pages with only one chip access,
thus allowing all the screen colors to be changed at the line frequency. A bit-to-bit correspondence is used;
therefore, in the above configuration, page-register bits 7 through 4 map onto palette-address bits 7 through
4, respectively. This is illustrated in Table 2–3.
Writing to Color-Palette RAM
NOTE:
The additional bits from the page register are inserted after the read mask.
The palette-page register specifies the additional bit planes for the overlay field in
direct-color modes with less than 8 bits per pixel overlay.
Table 2–3. Allocation of Palette-Page Register Bits
NUMBER OF BIT PLANES
MSB
PALETTE-ADDRESS BITS
LSB
8
M
M
M
M
M
M
M
M
4
P7
P6
P5
P4
M
M
M
M
2
P7
P6
P5
P4
P3
P2
M
M
1
P7
P6
P5
P4
P3
P2
P1
M
Pn = n bit from page register
M = bit from pixel port
Read Masking
The read-mask register is an 8-bit register used to enable or disable a bit plane from addressing the
color-palette RAM in the pseudo-color modes. Each palette address bit is logically ANDed with the
corresponding bit from the read mask register before going to the palette-page register and addressing the
palette RAM.
In order to provide maximum flexibility to control palette data, the read mask operation is performed before
the addition of the page register bits. Therefore, care must be taken in those modes that have less than eight
bits per pixel of pseudo-color or overlay data. Be aware of the palette-page register settings in these modes.
2.2.4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TVP3010-110FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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| TVP3010-135MGA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3010-135MGAB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3010-170FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC) |
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