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User’s Manual U18854EJ2V0UD
11
5.5.3
Relationship between programmable wait and external wait ................................................... 251
5.5.4
Programmable address wait function ...................................................................................... 252
5.6
Idle State Insertion Function ................................................................................................253
5.7
Bus Hold Function ................................................................................................................254
5.7.1
Functional outline .................................................................................................................... 254
5.7.2
Bus hold procedure ................................................................................................................. 255
5.7.3
Operation in power save mode................................................................................................ 255
5.8
Bus Priority ............................................................................................................................256
5.9
Bus Timing .............................................................................................................................257
CHAPTER 6 CLOCK GENERATION FUNCTION ...............................................................................260
6.1
Overview.................................................................................................................................260
6.2
Configuration .........................................................................................................................261
6.3
Registers ................................................................................................................................264
6.4
Operation................................................................................................................................273
6.4.1
Setting CPU clock.................................................................................................................... 273
6.4.2
Operation of each clock ........................................................................................................... 274
6.4.3
Clock output function ............................................................................................................... 275
6.5
PLL/SSCG Function ..............................................................................................................276
6.5.1
Overview ................................................................................................................................. 276
6.5.2
Registers ................................................................................................................................. 276
6.5.3
Using PLL ................................................................................................................................ 283
6.5.4
Using SSCG ............................................................................................................................ 285
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA) ..............................................................288
7.1
Overview.................................................................................................................................288
7.2
Functions ...............................................................................................................................288
7.3
Configuration .........................................................................................................................289
7.4
Registers ................................................................................................................................291
7.5
Operation................................................................................................................................305
7.5.1
Interval timer mode (TAAnMD2 to TAAnMD0 bits = 000) ........................................................ 306
7.5.2
External event count mode (TAAnMD2 to TAAnMD0 bits = 001) ............................................ 315
7.5.3
External trigger pulse output mode (TAAnMD2 to TAAnMD0 bits = 010) ................................ 323
7.5.4
One-shot pulse output mode (TAAnMD2 to TAAnMD0 bits = 011).......................................... 335
7.5.5
PWM output mode (TAAnMD2 to TAAnMD0 bits = 100) ......................................................... 342
7.5.6
Free-running timer mode (TAAnMD2 to TAAnMD0 bits = 101) ............................................... 351
7.5.7
Pulse width measurement mode (TAAnMD2 to TAAnMD0 bits = 110).................................... 368
7.5.8
Timer output operations........................................................................................................... 374
7.6
Timer-Tuned Operation Function ........................................................................................375
7.6.1
Free-running timer mode (during timer-tuned operation) ......................................................... 377
7.6.2
PWM output mode (during timer-tuned operation)................................................................... 384
7.6.3
Triangular PWM output mode (during timer-tuned operation) (V850ES/HJ3 only) .................. 386
7.7
Cascade Connection.............................................................................................................388
7.8
Selector Function ..................................................................................................................393
7.9
Cautions .................................................................................................................................395
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB) ..............................................................396
8.1
Overview.................................................................................................................................396