參數(shù)資料
型號: V55C2128164VB
廠商: Mosel Vitelic, Corp.
英文描述: 128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16
中文描述: 128Mbit低功率SDRAM 2.5伏,第二的TSOP / BGA封裝,8米× 16
文件頁數(shù): 8/44頁
文件大?。?/td> 591K
代理商: V55C2128164VB
8
V55C2128164V(T/B) Rev. 1.2 August 2002
MOSEL VITELIC
V55C2128164V(T/B)
A11
A3
A4
A2
A1
A0
A10 A9
A8
A7
A6
A5
Address Bus (Ax)
TCR
PASR
Mode Register
A4
A3
Max case temp
70
O
C
45
O
C
15
O
C
85
O
C
0
0
0
1
1
0
1
1
all have to be set to "0"
BA0
BA1
Partial-Array Self Refresh:
A2
A1
A0
banks to be self-refreshed
0
0
0
all banks
0
0
1
1/2 array (BA1=0)
0
1
0
1/4 array (BA1=0, BA0=0)
0
1
1
Reserved
1
0
0
Reserved
1
0
1
1/8 array (BA1=BA0=0, A11=0)
1
1
0
1/16 array (BA1=BA0=0,
A11=A10=0)
1
1
1
Reserved
1*)
0*)
Temperature-Compensated
Self-Refresh:
*)BA1 and BA0 must be 1, 0 to select the Extended Mode Register (Vs. the Mode Register)
The Low Power Mode Register must be set during the initialization sequence. Once the device is operational, the
Low Power Mode Register set can be issued anytime when the part is idle.
Low Power Mode Register Table
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