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參數(shù)資料
| 型號： | V59C1G01408QAJ37E |
| 廠商： | PROMOS TECHNOLOGIES INC |
| 元件分類： | DRAM |
| 英文描述： | 256M X 4 DDR DRAM, 0.5 ns, PBGA68 |
| 封裝： | ROHS COMPLIANT, FBGA-68 |
| 文件頁數(shù)： | 14/79頁 |
| 文件大?。?/td> | 1029K |
| 代理商： | V59C1G01408QAJ37E |
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ProMOS TECHNOLOGIES
V59C1G01(408/808/168)QA
V59C1G01(408/808/168)QA Rev. 1.2 April 2008
Symbol
Parameter / Condition
min.
max.
Units
Notes
tAOND
ODT turn-on delay
2
tCK
tAON
ODT turn-on
tAC(min)
tAC(max) +2.575
ns
1
tAONPD
ODT turn-on (Power-Down Modes)
tAC(min) + 2ns
3 tCK + tAC(max) + 1
ns
3
tAOFD
ODT turn-off delay
2.5
tCK
tAOF
ODT turn-off
tAC(min)
tAC(max) + 0.6ns
ns
2
tAOFPD
ODT turn-off (Power-Down Modes)
tAC(min) + 2ns
2.5 tCK + tAC(max) + 1ns
ns
3
tANPD
ODT to Power Down Mode Entry Latency
4
tCK
4
tAXPD
ODT Power Down Exit Latency
11
tCK
4
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on.
ODT turn on time max. is when the ODT resistance is fully on. Both are measured from tAOND.
2) ODT turn off time min. is when the device stars to turn-off ODT resistance..
ODT turn off time max. is when the bus is in high impedance. Both are measured from tAOFD.
3) For Standard Active Power-down - with MRS A12 = “0” - the non power-down timings (tAOND, tAON, tAOFD and tAOF) apply
4) tANPD and tAXPD define the timing limit when either Power Down Mode Timings (tAONPD, tAOFPD) or Non-Power Down Mode timings (tAOND
,
tAOFD) have to be applied.
AC Electrical Characteristics and Operation Conditions: For speed 1066
For tAONPD(max) DDR1066 it's 3tCK+tAC(max)+1ns
2
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