參數(shù)資料
型號(hào)： V59C1G01408QAJ37E
廠商： PROMOS TECHNOLOGIES INC
元件分類： DRAM
英文描述： 256M X 4 DDR DRAM, 0.5 ns, PBGA68
封裝： ROHS COMPLIANT, FBGA-68
文件頁(yè)數(shù)： 53/79頁(yè)
文件大小： 1029K
代理商： V59C1G01408QAJ37E
57
ProMOS TECHNOLOGIES
V59C1G01(408/808/168)QA
V59C1G01(408/808/168)QA Rev. 1.2 April 2008
AC & DC operating conditions
Operation or timing that is not specified is illegal, and after such an event, in order to guarantee proper operation, the
DRAM must be powered down and then restarted through the speechified initialization sequence before normal
operation can continue.
Absolute maximum DC ratings
Symbol
Parameter
Rating
Units
Notes
VDD
Voltage on VDD pin relative to Vss
- 1.0 V ~ 2.3 V
V
1,3
VDDQ
Voltage on VDDQ pin relative to Vss
- 0.5 V ~ 2.3 V
V
1,3
VDDL
Voltage on VDDL pin relative to Vss
- 0.5 V ~ 2.3 V
V
1,3
V
IN
, VOUT
Voltage on any pin relative to Vss
- 0.5 V ~ 2.3 V
V
1
T
STG
Storage Temperature
-55 to +100
C
1, 2
NOTE 1
Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability
NOTE 2
Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to
JESD51-2 standard.
NOTE 3
When VDD and VDDQ and VDDL are less than 500 mV, Vref may be equal to or less than 300 mV.
Recommended DC operating conditions (SSTL_1.8)
Symbol
Parameter
Rating
Units
Notes
Min.
Typ.
Max.
VDD
Supply Voltage
1.7
1.8
1.9
V
1
VDDL
Supply Voltage for DLL
1.7
1.8
1.9
V
5
VDDQ
Supply Voltage for Output
1.7
1.8
1.9
V
1, 5
VREF
Input Reference Voltage
0.49 x VDDQ
0.50 x VDDQ
0.51 x VDDQ
mV
2. 3
VTT
Termination Voltage
VREF - 0.04
VREF
VREF + 0.04
V
4
NOTE 1 There is no specific device VDD supply voltage requirement for SSTL_18 compliance. However under all conditions VDDQ must be less
than or equal to VDD.
NOTE 2
The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF is expected
to be about 0.5 x VDDQ of the transmitting device and VREF is expected to track variations in VDDQ.
NOTE 3
Peak to peak ac noise on VREF may not exceed +/-2 % VREF(dc).
NOTE 4
VTT of transmitting device must track VREF of receiving device.
NOTE 5
VDDQ tracks with VDD, VDDL tracks with VDD. AC parameters are measured with VDD, VDDQ and VDDDL tied together
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