![](http://datasheet.mmic.net.cn/220000/VPC3200A_datasheet_15512207/VPC3200A_24.png)
VPC 323xD, VPC 324xD
ADVANCE INFORMATION
24
Micronas
2.12. Picture in Picture (PIP) Processing and
Control
2.12.1. Configurations
To support PIP and/or scan rate conversion (SRC)
applications, the VPC32xxD provides several control
signals for an external field memory IC.
Fig. 2–21 demonstrates two applications with a single
VPC 32xxD. In these cases the VPC
single
writes the
main picture or one of several inset picture(s) into the
field memory. Only one of these pictures is displayed
live. These configurations are suitable for features
such as turner scan, still picture, still in picture and
simple scan rate conversion.
Fig. 2–22 shows an enhanced configuration with two
VPC 32xxD’s. In this case, one live and several still
pictures are inserted into the main live video signal.
The VPC
pip
processes the inset picture and writes the
original or decimated picture into the field memory.
The VPC
main
delivers the main picture, combines it
with the inset picture(s) from the field memory and
stores the combined video signal into a second field
memory for the SRC.
Fig. 2–21:
Typical configurations with single VPC 32xxD
Fig. 2–22:
Enhanced configuration with two VPC 32xxD
VPC
32XXD
(single)
field
memory
DDP
3310B
YC
r
C
b
/RGB
CVBS
YC
r
C
b
LLC1,
RSTWR,
WE, IE
YC
r
C
b
RGB
H/V
Def.
LLC2,
FIFORRD,
FIFORD
VPC
32XXD
(single)
YC
r
C
b
/RGB
CVBS
YC
r
C
b
LLC1,
RSTWR,
WE, IE
YC
r
C
b
field
memory
LLC1,
RSTWR,
RE
VPC
32XXD
(pip)
VPC
32XXD
(main)
field
memory
(for PIP)
field
memory
(for SRC)
DDP
3310B
YC
r
C
b
/RGB
CVBS
YC
r
C
b
/RGB
CVBS
(for main picture)
(for PIP)
YC
r
C
b
LLC1,
RSTWR,
WE, IE
YC
r
C
b
YC
r
C
b
LLC1,
RSTWR,
RE, OE
LLC1,
RSTWR,
WE, IE
RGB
H/V
Def.
LLC2,
FIFORRD,
FIFORD
YC
r
C
b