參數(shù)資料
型號： VPC3200A
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
元件分類： 消費家電
英文描述： Comb Filter Video Processor
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： PLASTIC, QFP-80
文件頁數(shù)： 74/78頁
文件大小： 1245K
代理商： VPC3200A
VPC 323xD, VPC 324xD
ADVANCE INFORMATION
74
Micronas
Notes:
- NPIX
main
and NLIN
main
: correspond to VPC
main
- NPIX
PIP
and NLIN
PIP
: correspond to VPC
single
and VPC
pip
- NROW
fp
and NPEL
fp
: number of lines per field and number of pixels per line of a full picture
(e.g. NROW
fp
=288, NPEL
fp
= 720 for PAL at 13.5 MHz)
- NROW
sp
and NPEL
sp
: number of lines per field and number of pixels per line of a inset picture
The limits of the I
2
C register settings are given in Table
5–2. No range check and value limitation are carried
out in the field memory controller. An illegal setting of
these parameters leads to a error behavior of the PIP
function.
The PIP display is controlled by the commands written
into the register PIPOPER. For the VPC
main
, the PIP
display is turned on or off by the commends DIS-
START and DISSTOP. For the VPC
pip
and VPC
single
, 8
commands are available:
– WRFRCOL1, WRFRCOL2: to fill the frame of a
inset picture with the color COLFR1 or COLFR2,
– WRBGD, WRBGDNF: to fill a inset picture with the
background color COLBGD,
– WRPIC, WRPICNF, WRSTOP: to start and stop to
write a inset picture with the active video,
– WRMAIN: to start write the main picture part outside
the inset picture(s) with the active video (only for
VPC
single
).
While WRPIC, WRSTOP, WRFRCOL1, WRFRCOL2
and WRBGD control a display with a frame (see Fig.
5–2), WRPICNF and WRBGDNF control a display
without a frame (see Fig. 5–3). The number of the inset
picture addressed by the current commend is given by
bits NSPX and NSPY in the register PIPOPER.
In the display window, the coordinate of the upper-left
corner of the inset picture with NSPX=0 and NSPY=0
is defined by the registers LINOFFS and PIXOFFS. If
maximal 4x4 inset pictures are used, no new setting of
these registers is needed. The default setting
LINOFFS=0 and PIXOFFS=0 takes effect. If more than
4x4 inset pictures are involved in a PIP application,
these inset pictures should be grouped, so that the
inset pictures in each group can be addressed by bits
NSPX and NSPY. For writing each group, the registers
LINOFFS and PIXOFFS should be set correctly (see
Fig.5–4).
Fig. 5–2:
4x4 inset pictures with frame
Table 5–2:
Limits of the I
2
C register settings for programming a PIP mode
I
2
C register
VPC
main
VPC
pip
and VPC
single
NPFB
NPFB
≥
NPIX
main
+ X, (X=2 for TI and X=0 for rest field memories) and
NPFB x NLIN
main
≤
total field memory size
NPIX
0 < NPIX
≤
NPFB - X and
0 < NPIX
≤
NPEL
fp
0 < NPIX
≤
NPELsp
NLIN
NPFB x NLIN
≤
total field memory size and 0
≤
NLIN < NROW
fp
0
≤
NLIN < NROW
sp
HSTR
0
≤
HSTR < NPEL
fp
- NPIX
main
0
≤
HSTR < NPEL
sp
- NPIX
PIP
VSTR
0
≤
VSTR < NLIN
fp
- NLIN
main
0
≤
VSTR < NLIN
sp
- NLIN
PIP
PIXOFFS
not used
0
≤
PIXOFFS < NPIX
main
- (number of pixels
of inset pictures to the right of PIXOFFS)
LINOFFS
not used
0
≤
LINOFFS < NLIN
main
- (number of lines of
inset pictures below LINOFFS)
00
01
10
11
NSPX
00
01
10
11
NSPY
(LINOFFS, PIXOFFS)
display window
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