![](http://datasheet.mmic.net.cn/220000/VPX3214_datasheet_15512234/VPX3214_62.png)
PRELIMINARY DATA SHEET
VPX 3220 A, VPX 3216 B, VPX 3214 C
MICRONAS INTERMETALL
62
6.6.9. Characteristics, Analog Front-End and ADCs
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
V
VIN
Full Scale Input Voltage, Video 1
VIN1,
VIN2,
VIN3
1.8
2.0
2.2
V
PP
min. AGC Gain
V
VIN
Full Scale Input Voltage, Video 1
0.5
0.6
0.7
V
PP
max. AGC Gain
V
VINCL
Video 1 Input Clamping Level,
CVBS
1.0
V
Binary Level = 68 LSB
min. AGC Gain
V
CIN
Full Scale Input Voltage, Chroma
CIN,
VIN1
1.08
1.2
1.32
V
PP
V
VINCL
Video 2 Input Clamping Level,
CVBS
1.2
V
Binary Level = 68 LSB
V
CINB
Video 2 Input Bias Level,
SVHS Chroma
–
1.5
–
V
R
CIN
Video 2 Input Resistance
SVHS Chroma
1.4
2
2.6
k
Binary Code for Open
Chroma Input
VIN1
CIN
128
Q
CL
Input Clamping Current
Resolution
VIN1–3,
CIN
–16
15
steps
I
CL
Input Clamping Current per step
0.7
1
1.3
μ
A
V
VRT
Reference Voltage Top
VRT
2.5
2.6
2.8
V
10
μ
F/10 nF, 1 G
Probe
BW
Video 1 Bandwidth
10
MHz
–3 dB for full-scale signal
BW
Video 2 Bandwidth
10
MHz
–3 dB for full-scale signal
XTALK
Crosstalk, any Two Video Inputs
–56
dB
at 1 MHz
THD
Distortion
–50
–42
dB
at 1 MHz, 5th harmonics
SNDR
Video Signal to Noise
and Distortion Ratio
VIN1–3,
CIN
41
45
dB
at 1 MHz, only one output
INL
Video Integral Non-Linearity,
static
±
1
LSB
Code Density
DNL
Video Differential Non-Linearity
±
0.5
±
0.8
LSB
Code Density
DG
Video Differential Gain
±
3
%
300 mV
PP
, 4.4 MHz on ramp
DP
Video Differential Phase
3
deg
300 mV
PP
, 4.4 MHz on ramp
38
39
40
41
42
43
44
45
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
S
PVDD [V]
Dependency between SNR and Power Supply
Both ADCs are working and routed to A[7:0], and B[7:0].
All Interfaces are working with maximum driver strength
Bandwidth measurement is performed up to 5 MHz.