- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359412 > VPX3224E (MICRONAS SEMICONDUCTOR HOLDING AG) Video Pixel Decoders PDF資料下載
參數(shù)資料
| 型號(hào)： | VPX3224E |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | Video Pixel Decoders |
| 中文描述： | 視頻解碼器像素 |
| 文件頁數(shù)： | 29/92頁 |
| 文件大小： | 616K |
| 代理商： | VPX3224E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當(dāng)前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
ADVANCE INFORMATION
VPX 322xE
MICRONAS INTERMETALL
29
2.11. Windowing the Video Field
For each input video field, two non-overlapping video
windows can be defined. The dimensions of these win-
dows are supplied via I
2
C commands. The presence of
two windows allows separate processing parameters
such as filter responses and the number of pixels per line
to be selected.
External control over the dimensions of the windows is
performed by I
2
C writes to a window-load-table (Win-
LoadTab). For each window, a corresponding WinLoad-
Tab is defined in a table of registers in the FP-RAM [win-
dow1: 0x120–128; window2: 0x12a–132].
Data written
to these tables does not become active until the cor-
responding latch bit is set
in the control register FP-
RAM 0x140. A 2-bit flag specifies the field polarity over
which the window is active [vlinei1,2].
Vertically, as can be seen in Fig.
2–32, each window is
defined by a beginning line given in FP-RAM 0x120/12A,
a number of lines to be read-in (FP-RAM 0x121/12B),
and a number of lines to be output (FP-RAM
0x122/12C). Each of these values is specified in units of
video lines.
Line 1
Window 1
Window 2
begin
# lines in,
# lines out
begin
# lines in,
# lines out
Fig. 2–32:
Vertical dimensions of windows
The option, to separately specify the number of input
lines and the number of output lines, enables vertical
compression. In the VPX, vertical compression is per-
formed via simple line dropping. A nearest neighbor al-
gorithm selects the subset of the lines for output. The
presence of a valid line is signalled by the ‘video active’
qualifier (or the corresponding SAV/EAV code in em-
bedded sync modes).
The numbering of the lines in a field of interlace video is
dependent on the line standard. Figs. 2–34 and 2–35 il-
lustrate the mapping of the window dimensions to the
actual video lines. The indices on the left are the line
numbers relative to the beginning of the frame. The in-
dices on the right show the numbering used by the VPX.
As seen here, the vertical boundaries of windows are de-
fined relative to the field boundary. Spatially, the lines
from field #1 are displayed above identically numbered
from field #2. For example: On an interlace monitor, line
#23 from field #1 is displayed directly above line #23
from field #2. There are a few restrictions to the vertical
definition of the windows. Windows must not overlap
vertically but can be adjacent. The first allowed line with-
in a field is line #10 for 525/60 standards and line #7 for
625/50 standards. The number of output lines cannot be
greater than the number of input lines (no vertical zoom-
ing). The combined height of the two windows cannot
exceed the number of lines in the input field.
Horizontally, the windows are defined by a starting point
defined in FP-RAM 0x123/12D and the length in FP-
RAM 0x124/12E. They are both
given relative to the
number of pixels (NPix) in the active portion of the line
(Fig. 2–33) selected in FP-RAM 0x125/12F. The scaling
factor is calculated internally from NPix.
Window
H Begin
H Length
N Pix
Fig. 2–33:
Horizontal dimensions of sampling window
64 sec
53.33 sec
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VPX322XE | Video Pixel Decoders |
| VQ1000J | N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓60V,夾斷電流0.225A的N溝道增強(qiáng)型MOSFET晶體管) |
| VQ1000J | N-Channel 60-V (D-S) MOSFET |
| VQ1001J | Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode |
| VQ1001J | N-Channel Enhancement-Mode MOSFET Transistor(最小漏源擊穿電壓30V，夾斷電流0.83A的N溝道增強(qiáng)型MOSFET) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VPX3225D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Pixel Decoders |
| VPX3225D-C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| VPX3225E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
| VPX3226E | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
| VPX322XE | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Video Pixel Decoders |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。